TMP320C2811PBKA datasheet(128/147 Pages) TI

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Electrical Specifications

128

June 2004

SPRS257

6.29.2 ADC Electrical Characteristics Over Recommended Operating Conditions

Table 6−38. DC Specifications (See Note 1)

PARAMETER

MIN

TYP

MAX

UNIT

Resolution

Bits

ADC clock (See Note 2)

kHz

ADC clock (See Note 2)

MHz

ACCURACY

INL (Integral nonlinearity)

±1.5

LSB

DNL (Differential nonlinearity)

±1

LSB

Offset error (See Note 3)

±80

LSB

Overall gain error with internal reference

(See Note 4)

±50

LSB

Overall gain error with external reference

(See Note 5)

If ADCREFP-ADCREFM = 1 V ±0.1%

±50

LSB

Channel-to-channel offset variation

±8

LSB

Channel-to-channel Gain variation

±8

LSB

ANALOG INPUT

Analog input voltage (ADCINx to ADCLO)

(See Note 6)

ADCLO

−5

Input capacitance

Input leakage current

±5

µA

INTERNAL VOLTAGE REFERENCE (See Note 4)

Accuracy, ADCVREFP

Accuracy, ADCVREFM

Voltage difference, ADCREFP - ADCREFM

Temperature coefficient

PPM/°C

Reference noise

100

µV

EXTERNAL VOLTAGE REFERENCE (See Note 5)

Accuracy, ADCVREFP

1.9

2.1

Accuracy, ADCVREFM

0.95

1.05

Input voltage difference,

ADCREFP - ADCREFM

0.99

1.01

NOTES: 1. Tested at 12.5-MHz ADCCLK

2. If SYSCLKOUT ≤ 25 MHz, ADC clock ≤ SYSCLKOUT/2

3. 1 LSB has the weighted value of 3.0/4096 = 0.732 mV.

4. A single tirmmed internal band gap reference sources both ADCREFP and ADCREFM signals, and hence, these voltages track

together. The ADC converter uses the difference between these two as its reference. The total gain error will be the combination

of the gain error shown here and the voltage reference accuracy (ADCREFP - ADCREFM). A software-based calibration

procedure is recommended for better accuracy. See F2812 ADC Calibration Application Note (literature number SPRA989) and

Section 5.2, Documentation Support, for relevant documents.

5. In this mode, the accuracy of external reference is critical for overall gain. The voltage difference (ADCREFP-ADCREFM) will

determine the overall accuracy.

6. Voltages above VDDA + 0.3 V or below VSS - 0.3 V applied to an analog input pin may temporarily affect the conversion of another

pin. To avoid this, the analog inputs should be kept within these limits.

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