TMP320C2811PBKA datasheet(78/147 Pages) TI

78 / 147 page

Peripherals

June 2004

SPRS257

If configured for digital I/O mode, additional registers are provided for setting individual I/O signals (via the

GPxSET registers), for clearing individual I/O signals (via the GPxCLEAR registers), for toggling individual I/O

signals (via the GPxTOGGLE registers), or for reading/writing to the individual I/O signals (via the GPxDAT

registers). Table 4−12 lists the GPIO Data Registers. For more information, see the TMS320F28x System

Control and Interrupts Reference Guide

(literature number SPRU078).

Table 4−12. GPIO Data Registers†‡

NAME

ADDRESS

SIZE (x16)

GPADAT

0x00 70E0

GPIO A Data Register

GPASET

0x00 70E1

GPIO A Set Register

GPACLEAR

0x00 70E2

GPIO A Clear Register

GPATOGGLE

0x00 70E3

GPIO A Toggle Register

GPBDAT

0x00 70E4

GPIO B Data Register

GPBSET

0x00 70E5

GPIO B Set Register

GPBCLEAR

0x00 70E6

GPIO B Clear Register

GPBTOGGLE

0x00 70E7

GPIO B Toggle Register

reserved

0x00 70E8

reserved

0x00 70E9

reserved

0x00 70EA

reserved

0x00 70EB

GPDDAT

0x00 70EC

GPIO D Data Register

GPDSET

0x00 70ED

GPIO D Set Register

GPDCLEAR

0x00 70EE

GPIO D Clear Register

GPDTOGGLE

0x00 70EF

GPIO D Toggle Register

GPEDAT

0x00 70F0

GPIO E Data Register

GPESET

0x00 70F1

GPIO E Set Register

GPECLEAR

0x00 70F2

GPIO E Clear Register

GPETOGGLE

0x00 70F3

GPIO E Toggle Register

GPFDAT

0x00 70F4

GPIO F Data Register

GPFSET

0x00 70F5

GPIO F Set Register

GPFCLEAR

0x00 70F6

GPIO F Clear Register

GPFTOGGLE

0x00 70F7

GPIO F Toggle Register

GPGDAT

0x00 70F8

GPIO G Data Register

GPGSET

0x00 70F9

GPIO G Set Register

GPGCLEAR

0x00 70FA

GPIO G Clear Register

GPGTOGGLE

0x00 70FB

GPIO G Toggle Register

reserved

0x00 70FC

0x00 70FF

† Reserved locations will return undefined values and writes will be ignored.

‡ These registers are NOT EALLOW protected. The above registers will typically be accessed regularly by the user.

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