PM0056 datasheet(131/156 Pages) STMICROELECTRONICS

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PM0056

Core peripherals

4.4.3

Interrupt control and state register (SCB_ICSR)

Address offset: 0x04

Reset value: 0x0000 0000

Required privilege: Privileged

The ICSR:

•

Provides:

–

A set-pending bit for the Non-Maskable Interrupt (NMI) exception

–

Set-pending and clear-pending bits for the PendSV and SysTick exceptions

•

Indicates:

–

The exception number of the exception being processed

–

Whether there are preempted active exceptions

–

The exception number of the highest priority pending exception

–

Whether any interrupts are pending.

Caution:

When you write to the ICSR, the effect is unpredictable if you:

•

Write 1 to the PENDSVSET bit and write 1 to the PENDSVCLR bit

•

Write 1 to the PENDSTSET bit and write 1 to the PENDSTCLR bit.

3029

NMIPE

NDSET

Reserved

PEND

SVSET

PEND

SVCLR

PEND

STSET

PENDS

TCLR

Reserved

ISRPE

NDING

VECTPENDING[9:4]

rrrr

VECTPENDING[3:0]

RETOB

ASE

Reserved

VECTACTIVE[8:0]

rrrr

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