PM0056 datasheet(78/156 Pages) STMICROELECTRONICS

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The Cortex-M3 instruction set

PM0056

78/156

DocID15491 Rev 5

Examples

CLZR4,R9

CLZNER2,R3

3.5.5

CMP and CMN

Compare and compare negative.

Syntax

CMP{cond} Rn, Operand2

CMN{cond} Rn, Operand2

where:

•

‘cond’ is an optional condition code (see Conditional execution on page 57)

•

‘Rn’ is the register holding the first operand

•

‘Operand2’ is a flexible second operand (see Flexible second operand on page 52) for

details of the options.

Operation

These instructions compare the value in a register with operand2. They update the condition

flags on the result, but do not write the result to a register.

The CMP instruction subtracts the value of operand2 from the value in Rn. This is the same

as a SUBS instruction, except that the result is discarded.

The CMN instruction adds the value of operand2 to the value in Rn. This is the same as an

ADDS instruction, except that the result is discarded.

Restrictions

In these instructions:

•

Do not use PC

•

Operand2 must not be SP

Condition flags

These instructions update the N, Z, C and V flags according to the result.

Examples

CMPR2, R9

CMNR0, #6400

CMPGTSP, R7, LSL #2

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