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Z8F0113 bảng dữ liệu(PDF) 49 Page - Zilog, Inc. |
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Z8F0113 bảng dữ liệu(HTML) 49 Page - Zilog, Inc. |
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49 / 245 page ![]() PS024315-1011 P R E L I M I N A R Y Architecture Z8 Encore! XP® F0823 Series Product Specification 34 Architecture Figure 7 displays a simplified block diagram of a GPIO port pin. In this figure, the ability to accommodate alternate functions and variable port current drive strength is not dis- played. GPIO Alternate Functions Many of the GPIO port pins are used for general-purpose I/O and access to on-chip peripheral functions such as the timers and serial communication devices. The port A–D Alternate Function subregisters configure these pins for either GPIO or alternate function operation. When a pin is configured for alternate function, control of the port pin direction (input/output) is passed from the Port A–D Data Direction registers to the alternate func- tion assigned to this pin. Tables 16 and 17 list the alternate functions possible with each port pin for 8-pin and non-8-pin parts, respectively. The alternate function associated at a pin is defined through Alternate Function Sets subregisters AFS1 and AFS2. The crystal oscillator functionality is not controlled by the GPIO block. When the crystal oscillator is enabled in the oscillator control block, the GPIO functionality of PA0 and PA1 is overridden. In that case, those pins function as input and output for the crystal oscillator. Figure 7. GPIO Port Pin Block Diagram D Q DQ D Q GND VDD Port Output Control Port Data Direction Port Output Data Register Port Input Data Register Port Pin DATA Bus System Clock System Clock Schmitt-Trigger |
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