STM32F101X8_10 datasheet(27/85 Pages) STMICROELECTRONICS

27 / 85 page

STM32F101x8, STM32F101xB

Pinouts and pin description

Doc ID 13586 Rev 13

27/85

PD5

I/O

PD5

USART2_TX

PD6

I/O

PD6

USART2_RX

PD7

I/O

PD7

USART2_CK

PB3

I/O

JTDO

TIM2_CH2 / PB3

TRACESWO

SPI1_SCK

PB4

I/O

JNTRST

PB4 / TIM3_CH1

SPI1_MISO

PB5

I/O

PB5

I2C1_SMBAl

TIM3_CH2 /

SPI1_MOSI

PB6

I/O

PB6

I2C1_SCL(8)/

TIM4_CH1 (8)

USART1_TX

PB7

I/O

PB7

I2C1_SDA(8)/

TIM4_CH2 (8)

USART1_RX

BOOT0

PB8

I/O

PB8

TIM4_CH3 (8)

I2C1_SCL

PB9

I/O

PB9

TIM4_CH4 (8)

I2C1_SDA

PE0

I/O

PE0

TIM4_ETR

PE1

I/O

PE1

VSS_3

SVSS_3

100

VDD_3

SVDD_3

I = input, O = output, S = supply, HiZ= high impedance.

FT= 5 V tolerant.

Function availability depends on the chosen device. For devices having reduced peripheral counts, it is always the lower

number of peripherals that is included. For example, if a device has only one SPI, two USARTs and two timers, they will be

called SPI1, USART1 & USART2 and TIM2 & TIM 3, respectively. Refer to Table 2 on page 11.

If several peripherals share the same I/O pin, to avoid conflict between these alternate functions only one peripheral should

be enabled at a time through the peripheral clock enable bit (in the corresponding RCC peripheral clock enable register).

PC13, PC14 and PC15 are supplied through the power switch. Since the switch only sinks a limited amount of current (3

mA), the use of GPIOs PC13 to PC15 in output mode is limited: the speed should not exceed 2 MHz with a maximum load

of 30 pF and these IOs must not be used as a current source (e.g. to drive an LED).

Main function after the first backup domain power-up. Later on, it depends on the contents of the Backup registers even

after reset (because these registers are not reset by the main reset). For details on how to manage these IOs, refer to the

Battery backup domain and BKP register description sections in the STM32F10xxx reference manual, available from the

STMicroelectronics website: www.st.com.

The pins number 2 and 3 in the VFQFPN36 package, and 5 and 6 in the LQFP48 and LQFP64 packages are configured as

OSC_IN/OSC_OUT after reset, however the functionality of PD0 and PD1 can be remapped by software on these pins. For

the LQFP100 package, PD0 and PD1 are available by default, so there is no need for remapping. For more details, refer to

the Alternate function I/O and debug configuration section in the STM32F10xxx reference manual.

The use of PD0 and PD1 in output mode is limited as they can only be used at 50 MHz in output mode.

This alternate function can be remapped by software to some other port pins (if available on the used package). For more

details, refer to the Alternate function I/O and debug configuration section in the STM32F10xxx reference manual, available

from the STMicroelectronics website: www.st.com.

Table 4.

Medium-density STM32F101xx pin definitions (continued)

Pins

Pin name

Main

function(3)

(after reset)

Alternate functions(3)(4)

Default

Remap

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