STM32F101X8_10 datasheet(80/85 Pages) STMICROELECTRONICS

80 / 85 page

Revision history

STM32F101x8, STM32F101xB

80/85

Doc ID 13586 Rev 13

18-Oct-2007

VESD(CDM) value added to Table 31: ESD absolute maximum ratings.

Note added below Table 10: Embedded reset and power control block

characteristics. and below Table 21: HSE 4-16 MHz oscillator

characteristics.

Note added below Table 34: Output voltage characteristics and VOH

parameter description modified.

Table 41: ADC characteristics and Table 43: ADC accuracy - limited test

conditions modified.

Figure 33: ADC accuracy characteristics modified.

Packages are ECOPACK® compliant.

Tables modified in Section 5.3.5: Supply current characteristics.

ADC and ANTI_TAMPER signal names modified (see Table 4: Medium-

density STM32F101xx pin definitions). Table 4: Medium-density

STM32F101xx pin definitions modified. Note 4 removed and values

updated in Table 21: Typical current consumption in Standby mode.

Vhys modified in Table 33: I/O static characteristics.

Updated: Table 29: EMS characteristics and Table 30: EMI

characteristics.

tVDD modified in Table 9: Operating conditions at power-up / power-

down.

Typical values modified, note 2 modified and note 3 removed in Table 25:

Low-power mode wakeup timings.

Maximum current consumption Table 12, Table 13 and Table 14 updated.

Values added and notes added in Table 15: Typical and maximum

current consumptions in Stop and Standby modes.

On-chip peripheral current consumption on page 43 added.

Package mechanical data inch values are calculated from mm and

rounded to 4 decimal digits (see Section 6: Package characteristics).

Vprog added to Table 27: Flash memory characteristics.

TS_temp added to Table 45: TS characteristics.

TS_vrefint added to Table 11: Embedded internal reference voltage.

Handling of unused pins specified in General input/output characteristics

on page 52. All I/Os are CMOS and TTL compliant.

Table 4: Medium-density STM32F101xx pin definitions: table clarified

and Note 7 modified.

Internal LSI RC frequency changed from 32 to 40 kHz (see Table 24: LSI

oscillator characteristics). Values added to Table 25: Low-power mode

wakeup timings. NEND modified in Table 28: Flash memory endurance

and data retention.

Option byte addresses corrected in Figure 8: Memory map.

ACCHSI modified in Table 23: HSI oscillator characteristics.

tJITTER removed from Table 26: PLL characteristics.

Appendix A: Important notes on page 71 added.

Added: Figure 13, Figure 14, Figure 16 and Figure 18.

Table 53.

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