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công cụ tìm kiếm bảng dữ liệu linh kiện điện tử |
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TDA9983BHW/8/C1 bảng dữ liệu(PDF) 90 Page - NXP Semiconductors |
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TDA9983BHW/8/C1 bảng dữ liệu(HTML) 90 Page - NXP Semiconductors |
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90 / 119 page  TDA9983B_1 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 01 — 20 May 2008 90 of 119 NXP Semiconductors TDA9983B 150 MHz pixel rate HDMI transmitter 2 ISRC1 R/W international standard recording code 1: data packet header/contents as specified by registers 20h to 3Eh (see Table 103) 0* no specific action 1 insert ’isrc1’ in first free slot after the keepout window 1 GC R/W general control 0* no specific action 1 insert general control packet (just after v-pulse) 0 ACR R/W audio clock regeneration 0* no specific action 1 insert audio clock regeneration packets Table 100. DIP_IF_FLAGS register (address 0Fh) bit description Legend: * = default value Bit Symbol Access Value Description 7 to 6 x R/W 00* undefined 5 IF5 R/W if5: data packet header/contents as specified by registers A0h to BEh (page 10h) 0* no specific action 1 insert ’if5’ in first free slot after the keepout window 4 IF4 R/W if4: data packet header/contents as specified by registers 80h to 9Eh (page 10h) 0* no specific action 1 insert ’if4’ in first free slot after the keepout window 3 IF3 R/W if3: data packet header/contents as specified by registers 60h to 7Eh (page 10h) 0* no specific action 1 insert ’if3’ in first free slot after the keepout window 2 IF2 R/W if2: data packet header/contents as specified by registers 40h to 5Eh (page 10h) 0* no specific action 1 insert ’if2’ in first free slot after the keepout window 1 IF1 R/W if1: data packet header/contents as specified by registers 20h to 3Eh (page 10h) 0* no specific action 1 insert ’if1’ in first free slot after the keepout window 0 x R/W 0* undefined Table 99. DIP_FLAGS register (address 0Eh) bit description …continued Legend: * = default value Bit Symbol Access Value Description |
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