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TDA9983BHW/8/C1 bảng dữ liệu(PDF) 63 Page - NXP Semiconductors

tên linh kiện TDA9983BHW/8/C1
Giải thích chi tiết về linh kiện  HDMI transmitter up to 150 MHz pixel rate with 3 쨈 8-bit video inputs and 4 쨈 I2S-bus with S/PDIF
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TDA9983B_1
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 01 — 20 May 2008
63 of 119
NXP Semiconductors
TDA9983B
150 MHz pixel rate HDMI transmitter
9.5.2 Current page address register
9.6 Information frames and packets page register definitions
The current page address for the Information frames and packets page is 10h.
The configuration of the registers for this page is given in Table 83.
Table 81.
SEL_CLK register (address 11h) bit description
Legend: * = default value
Bit
Symbol
Access
Value
Description
7 to 4
x
R/W
0000*
undefined
3
ENA_SC_CLK
R/W
enable scaler clocks
0*
disable scaler clocks (sc_clk_m, clk1_m)
1
enable scaler clocks (sc_clk_m, clk1_m)
2 to 1
SEL_VRF_CLK[1:0]
R/W
select video reformatter clock
00*
vrf_clk_m = not tmdsclkpo;
sc_clk_m = tmdsclkpo
01
vrf_clk_m = scaclko_pllscgon;
sc_clk_m = not scaclko_pllscgon
10
vrf_clk_m = scaclko_tmdsclkn;
sc_clk_m = not scaclko_tmdsclkn
11
vrf_clk_m = scaclko_tmdsclkn;
sc_clk_m = not scaclko_tmdsclkn
0
SEL_CLK1
R/W
select clock 1
0*
clk1_m = not (plldeo)
1
clk1_m = plldeo_div2
Table 82.
CURPAGE_ADR register (address FFh) bit description
Legend: * = default value
Bit
Symbol
Access
Value
Description
7 to 0
CURPAGE_ADR[7:0]
W
00h*
current page address: selects the current
memory page



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