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TDA9983BHW/8/C1 bảng dữ liệu(PDF) 32 Page - NXP Semiconductors

tên linh kiện TDA9983BHW/8/C1
Giải thích chi tiết về linh kiện  HDMI transmitter up to 150 MHz pixel rate with 3 쨈 8-bit video inputs and 4 쨈 I2S-bus with S/PDIF
PDF  119 Pages
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nhà sản xuất  NXP [NXP Semiconductors]
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TDA9983B_1
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 01 — 20 May 2008
32 of 119
NXP Semiconductors
TDA9983B
150 MHz pixel rate HDMI transmitter
6 to 4
SWAP_E[2:0]
W
swap E selector
000
pin VPC[7:4] = vp[7:4]
001
pin VPC[3:0] = vp[7:4]
010
pin VPB[7:4] = vp[7:4]
011
pin VPB[3:0] = vp[7:4]
100
pin VPA[7:4] = vp[7:4]
101*
pin VPA[3:0] = vp[7:4]
other
pin VPA[3:0] = vp[7:4]
3
MIRR_F
W
mirror F
0*
no specific action
1
mirror nibble; m[3:0] = s[0:3]
2 to 0
SWAP_F[2:0]
W
swap F selector
000
pin VPC[7:4] = vp[3:0]
001
pin VPC[3:0] = vp[3:0]
010
pin VPB[7:4] = vp[3:0]
011
pin VPB[3:0] = vp[3:0]
100
pin VPA[7:4] = vp[3:0]
110*
pin VPA[3:0] = vp[3:0]
other
pin VPA[3:0] = vp[3:0]
Table 27.
VIP_CNTRL_3 register (address 23h) bit description
Legend: * = default value
Bit
Symbol
Access Value
Description
7
EDGE
W
edge
0*
vp-bus synchronized on positive edge of
vip_clk_m
1
vp-bus synchronized on negative edge of
vip_clk_m
6
x
W
0*
undefined
5 to 4
SP_SYNC[1:0]
W
sp synchronization
00
sp_cnt synchronized by hemb
01*
sp_cnt synchronized by rising edge de
10
sp_cnt synchronized by rising edge of hs
11
sp_cnt fixed at i2c_sp_cnt
3
EMB
W
embedded
0*
no specific action
1
use embedded synchronization codes
2
V_TGL
W
v_toggle
0
no specific action
1*
toggle vs/vref
Table 26.
VIP_CNTRL_2 register (address 22h) bit description …continued
Legend: * = default value
Bit
Symbol
Access Value
Description



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