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TDA9983BHW/8/C1 bảng dữ liệu(PDF) 48 Page - NXP Semiconductors

tên linh kiện TDA9983BHW/8/C1
Giải thích chi tiết về linh kiện  HDMI transmitter up to 150 MHz pixel rate with 3 쨈 8-bit video inputs and 4 쨈 I2S-bus with S/PDIF
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TDA9983B_1
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 01 — 20 May 2008
48 of 119
NXP Semiconductors
TDA9983B
150 MHz pixel rate HDMI transmitter
9.4.1 Scaler control registers
Table 52.
SC_VIDFORMAT register (address 00h) bit description
Legend: * = default value
Bit
Symbol
Access Value
Description
7 and 6 LUT_SEL[1:0]
W
look-up table select
00*
default coefficient set #1 (video)
01
default coefficient set #2 (enhanced sharpness)
1X
coefficient set as programmed via I2C-bus
5 to 3
VID_FORMAT_O[2:0] W
video format output
000*
480p 60 Hz
001
576p 50 Hz
010
720p 50 Hz/60 Hz
011
1080i 50 Hz/60 Hz
1XX
customized format
2 to 0
VID_FORMAT_I[2:0]
W
video format input
000*
480i 60 Hz
001
576i 50 Hz
010
480p 60 Hz
011
576p 50 Hz
1XX
customized format
Table 53.
SC_CNTRL register (address 01h) bit description
Legend: * = default value
Bit
Symbol
Access Value
Description
7 to 4
x
W
0000*
undefined
3
IL_OUT_ON
W
interlaced output on
0*
internal line phase toggle is ignored
1
interlaced output; output lines depend on
internal line phase toggle
2
PHASES_V
W
vertical phases
0*
90 vertical phases
1
54 vertical phases
1
VS_ON
W
vertical scaler on
0*
vertical scaler off
1
vertical scaler on
0
DEIL_ON
W
deinterlacer on
0*
deinterlacer off
1
deinterlacer on



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