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TDA9983BHW/8/C1 bảng dữ liệu(PDF) 29 Page - NXP Semiconductors

tên linh kiện TDA9983BHW/8/C1
Giải thích chi tiết về linh kiện  HDMI transmitter up to 150 MHz pixel rate with 3 쨈 8-bit video inputs and 4 쨈 I2S-bus with S/PDIF
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TDA9983B_1
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 01 — 20 May 2008
29 of 119
NXP Semiconductors
TDA9983B
150 MHz pixel rate HDMI transmitter
9.3.1 Main control register
9.3.2 Interrupt flags/masks registers
Table 20.
VERSION register (address 00h) bit description
Legend: * = default value
Bit
Symbol
Access Value
Description
7 to 4
-
R
0110
TDA9983B device version
3 to 0
-
R
0010
die version
Table 21.
MAIN_CNTRL0 register (address 01h) bit description
Legend: * = default value
Bit
Symbol
Access Value
Description
7
SCALER
W
scaler
0*
HDMI video formatter uses vip-output (scaler is
bypassed)
1
HDMI video formatter uses scaler-output
6 to 5
x
W
00*
undefined
4
CEHS
W
I2C-bus enable high speed
0*
I2C_SDA and I2C_SCL set to Standard or Fast
mode
1
I2C_SDA and I2C_SCL set to High-speed mode
3
CECS
W
I2C-bus enable current source
0*
I2C_SCL pull-up current source disabled
1
I2C_SCL pull-up current source enabled
2
DEHS
W
DDC-bus enable high speed
0*
DDC_SDA and DDC_SCL set to Standard or
Fast mode
1
DDC_SDA and DDC_SCL set to High-speed
mode
1
DECS
W
DDC-bus enable current source
0*
DDC_SCL pull-up current source disabled
1
DDC_SCL pull-up current source enabled
0SR
W
soft reset
0*
no specific action
1
soft reset for all modules which do not use the
cclk clock domain
Table 22.
INT_FLAGS_0 register (address 0Fh) bit description
Legend: * = default value
Bit
Symbol
Access Value
Description
7 to 2
x
R/W
0000 00* undefined
1
HPD
R/W
HPD: transition on HPD input
0*
FALSE/INT_disabled
1
TRUE/INT_enabled
0
x
R/W
0*
undefined



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