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TDA9983BHW/8/C1 bảng dữ liệu(PDF) 75 Page - NXP Semiconductors

tên linh kiện TDA9983BHW/8/C1
Giải thích chi tiết về linh kiện  HDMI transmitter up to 150 MHz pixel rate with 3 쨈 8-bit video inputs and 4 쨈 I2S-bus with S/PDIF
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TDA9983B_1
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 01 — 20 May 2008
75 of 119
NXP Semiconductors
TDA9983B
150 MHz pixel rate HDMI transmitter
6Bh
SPD_IF_BYTE8
7
x
R/W
0*
reserved (shall be zero)
6 to 0 SPD_IF_VN8[6:0]
R/W
000 0000*
character 8
source product description
InfoFrame product description:
7-bit ASCII code
6Ch
SPD_IF_BYTE9
7
x
R/W
0*
reserved (shall be zero)
6 to 0 SPD_IF_PD1[6:0]
R/W
000 0000*
character 1
6Dh
SPD_IF_BYTE10
7
x
R/W
0*
reserved (shall be zero)
6 to 0 SPD_IF_PD2[6:0]
R/W
000 0000*
character 2
6Eh
SPD_IF_BYTE11
7
x
R/W
0*
reserved (shall be zero)
6 to 0 SPD_IF_PD3[6:0]
R/W
000 0000*
character 3
6Fh
SPD_IF_BYTE12
7
x
R/W
0*
reserved (shall be zero)
6 to 0 SPD_IF_PD4[6:0]
R/W
000 0000*
character 4
70h
SPD_IF_BYTE13
7
x
R/W
0*
reserved (shall be zero)
6 to 0 SPD_IF_PD5[6:0]
R/W
000 0000*
character 5
71h
SPD_IF_BYTE14
7
x
R/W
0*
reserved (shall be zero)
6 to 0 SPD_IF_PD6[6:0]
R/W
000 0000*
character 6
72h
SPD_IF_BYTE15
7
x
R/W
0*
reserved (shall be zero)
6 to 0 SPD_IF_PD7[6:0]
R/W
000 0000*
character 7
73h
SPD_IF_BYTE16
7
x
R/W
0*
reserved (shall be zero)
6 to 0 SPD_IF_PD8[6:0]
R/W
000 0000*
character 8
74h
SPD_IF_BYTE17
7
x
R/W
0*
reserved (shall be zero)
6 to 0 SPD_IF_PD9[6:0]
R/W
000 0000*
character 9
75h
SPD_IF_BYTE18
7
x
R/W
0*
reserved (shall be zero)
6 to 0 SPD_IF_PD10[6:0]
R/W
000 0000*
character 10
76h
SPD_IF_BYTE19
7
x
R/W
0*
reserved (shall be zero)
6 to 0 SPD_IF_PD11[6:0]
R/W
000 0000*
character 11
77h
SPD_IF_BYTE20
7
x
R/W
0*
reserved (shall be zero)
6 to 0 SPD_IF_PD12[6:0]
R/W
000 0000*
character 12
78h
SPD_IF_BYTE21
7
x
R/W
0*
reserved (shall be zero)
6 to 0 SPD_IF_PD13[6:0]
R/W
000 0000*
character 13
79h
SPD_IF_BYTE22
7
x
R/W
0*
reserved (shall be zero)
6 to 0 SPD_IF_PD14[6:0]
R/W
000 0000*
character 14
7Ah
SPD_IF_BYTE23
7
x
R/W
0*
reserved (shall be zero)
6 to 0 SPD_IF_PD15[6:0]
R/W
000 0000*
character 15
7Bh
SPD_IF_BYTE24
7
x
R/W
0*
reserved (shall be zero)
6 to 0 SPD_IF_PD16[6:0]
R/W
000 0000*
character 16
Table 86.
SPD_IF_xx registers (address 60h to 7Eh) bit description …continued
Legend: * = default value
Address Register
Bit
Symbol
Access Value
Description



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