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TDA9983BHW/8/C1 bảng dữ liệu(PDF) 4 Page - NXP Semiconductors

tên linh kiện TDA9983BHW/8/C1
Giải thích chi tiết về linh kiện  HDMI transmitter up to 150 MHz pixel rate with 3 쨈 8-bit video inputs and 4 쨈 I2S-bus with S/PDIF
PDF  119 Pages
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TDA9983BHW/8/C1 bảng dữ liệu(HTML) 4 Page - NXP Semiconductors

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(1) Block can be bypassed.
Fig 1.
Block diagram
001aag248
VPA[7:0]
VIDEO
INPUT
PROCESSOR
UPSCALER(1)
VIDEO PROCESSING
3
× 8-bit
RGB
YCBCR 4 : 4 : 4
2
× 12-bit
or 1
× 12-bit
YCBCR 4 : 2 : 2
ITU656 or ITU656-like
UPSAMPLING
FROM
4 : 2 : 2
TO
4 : 4 : 4(1)
DOWNSAMPLING
FROM
4 : 4 : 4
TO
4 : 2 : 2(1)
COLOR
SPACE
CONVERTER
RGB TO YUV
YUV TO RGB
(4 : 4 : 4)(1)
DEINTERLACER
INTRAFIELD(1)
TDA9983B
AUDIO
PROCESSING
HPD
MANAGEMENT
DATA
ISLAND
PACKET
INFORMATION
FRAMES AND
PACKETS
VPB[7:0]
VPC[7:0]
VSYNC/VREF
HSYNC/HREF
DE/FREF
VCLK
2
1
80
68 to 70,
75 to 79
57 and 58,
61 to 65,
67
49 to 56
66
HPD
HDMI
SERIALIZER
26
TXC
−
27
TXC+
29
TX0
−
30
TX0+
32
TX1
−
33
TX1+
35
TX2
−
36
TX2+
DDC_SCL
DDC_SDA
20
19
INT
17
I2C-BUS
SLAVE
DDC-BUS
IRQ
GENERATION
I2C_SCL
I2C_SDA
A0
A1
43
44
41
40
AP7 to AP0
4 to 11
ACLK
12
18
VSSD
14, 47,
72
VSSC
15, 60,
73
VSSA(FRO_3V3)
22
VSSA(PLL_3V3)
39
TM
21
EXT_SWING
24
VSSH
25, 31,
37
VSSA(PLL_1V8)
46
HARD
RESET
RST_N
42
VPP
VDDD(3V3)
VDDC(1V8)
VDDA(FRO_3V3)
VDDH(3V3)
VDDA(PLL_3V3)
3
13, 48,
71
16, 45,
59, 74
23
28, 34
38



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