AT89LP6440 datasheet(52/194 Pages) ATMEL

52 / 194 page

3706A–MICRO–9/09

AT89LP6440 - Preliminary

Figure 11-2. Timer/Counter 1 Mode 1: 16-bit Auto-Reload

11.3

Mode 2 – 8-bit Auto-Reload Timer/Counter

Mode 2 configures the Timer register as an 8-bit Counter (TL1) with automatic reload, as shown

in Figure 11-3. Overflow from TL1 not only sets TF1, but also reloads TL1 with the contents of

TH1, which is preset by software. The reload leaves TH1 unchanged. Mode 2 operation is the

same for Timer/Counter 0.

Figure 11-3. Timer/Counter 1 Mode 2: 8-bit Auto-Reload

Note:

RH1/RL1 are not required by Timer 1 during Mode 2 and may be used as temporary storage

registers.

11.4

Mode 3 – 8-bit Split Timer

Timer 1 in Mode 3 simply holds its count. The effect is the same as setting TR1 = 0. Timer 0 in

Mode 3 establishes TL0 and TH0 as two separate counters. The logic for Mode 3 on Timer 0 is

shown in Figure 11-4. TL0 uses the Timer 0 control bits: C/T, GATE0, TR0, INT0, and TF0. TH0

is locked into a timer function (counting clock cycles) and takes over the use of TR1 and TF1

from Timer 1. Thus, TH0 now controls the Timer 1 interrupt. While Timer 0 is in Mode 3, Timer 1

will still obey its settings in TMOD but cannot generate an interrupt.

OSC

T1 Pin

TR1

GATE1

INT1 Pin

TL1

(8 Bits)

Control

Interrupt

C/T = 0

C/T =1

TH1

(8 Bits)

TF1

RL1

(8 Bits)

RH1

(8 Bits)

Reload

÷TPS

Mode 2:

Time-out Period

256

TH0

–

()

Oscillator Frequency

-------------------------------------------------------

TPS

()

OSC

T1 Pin

TR1

GATE1

TF1

TL1

(8 Bits)

TH1

(8 Bits)

Control

Reload

Interrupt

INT0 Pin

C/T = 0

C/T = 1

÷TPS

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