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AT89LP6440 bảng dữ liệu(PDF) 27 Page - ATMEL Corporation |
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AT89LP6440 bảng dữ liệu(HTML) 27 Page - ATMEL Corporation |
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27 / 194 page ![]() 27 3706A–MICRO–9/09 AT89LP6440 - Preliminary 5.2.2 Data Pointer Operating Modes The Dual Data Pointers on the AT89LP6440 include three additional operating modes that affect data pointer based instructions. These modes are controlled by bits in DSPR. 5.2.2.1 DPTR Redirect The Data Pointer Redirect to B bit, DPRB (DSPR.0), allows MOVX and MOVC instructions to use the B register as the data source/destination when the instruction references DPTR1 as shown in Table 5-6 and Table 5-7. DPRB can improve the efficiency of routines that must fetch multiple operands from different RAM locations. Table 5-5. DPCF – Data Pointer Configuration Register DPCF = A2H Reset Value = 0000 00X0B Not Bit Addressable DPU1 DPU0 DPD1 DPD0 SIGEN 0 – DPS Bit 7 6 543 21 0 Symbol Function DPU1 Data Pointer 1 Update. When set, MOVX @DPTR and MOVC @DPTR instructions that use DPTR1 will also update DPTR1 based on DPD1. If DPD1 = 0 the operation is post-increment and if DPD1 = 1 the operation is post-decrement. When DPU1 = 0, DPTR1 is not updated. DPU0 Data Pointer 0 Update. When set, MOVX @DPTR and MOVC @DPTR instructions that use DPTR0 will also update DPTR0 based on DPD0. If DPD0 = 0 the operation is post-increment and if DPD0 = 1 the operation is post-decrement. When DPU0 = 0, DPTR0 is not updated. DPD1 Data Pointer 1 Decrement. When set, INC DPTR instructions targeted to DPTR1 will decrement DPTR1. When cleared, INC DPTR instructions will increment DPTR1. DPD1 also determines the direction of auto-update for DPTR1 when DPU1 = 1. DPD0 Data Pointer 0 Decrement. When set, INC DPTR instructions targeted to DPTR0 will decrement DPTR0. When cleared, INC DPTR instructions will increment DPTR0. DPD0 also determines the direction of auto-update for DPTR0 when DPU0 = 1. SIGEN Signature Enable. When SIGEN = 1 all MOVC @DPTR instructions and all IAP accesses will target the signature array memory. When SIGEN = 0, all MOVC and IAP accesses target CODE memory. DPS Data Pointer Select. DPS selects the active data pointer for instructions that reference DPTR. When DPS = 0, DPTR will target DPTR0 and /DPTR will target DPTR1. When DPS = 1, DPTR will target DPTR1 and /DPTR will target DPTR0. Table 5-6. MOVX @DPTR Operating Modes DPRB DPS Equivalent Operation for MOVX MOVX A, @DPTR MOVX @DPTR, A DPTR /DPTR DPTR /DPTR 00 MOVX A, @DPTR0 MOVX A, @DPTR1 MOVX @DPTR0, A MOVX @DPTR1, A 01 MOVX A, @DPTR1 MOVX A, @DPTR0 MOVX @DPTR1, A MOVX @DPTR0, A 10 MOVX A, @DPTR0 MOVX B, @DPTR1 MOVX @DPTR0, A MOVX @DPTR1, B 11 MOVX B, @DPTR1 MOVX A, @DPTR0 MOVX @DPTR1, B MOVX @DPTR0, A |
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