AT89LP6440 datasheet(47/194 Pages) ATMEL

47 / 194 page

3706A–MICRO–9/09

AT89LP6440 - Preliminary

10.2

Port Analog Functions

The AT89LP6440 incorporates two analog comparators and an 8-channel analog-to-digital con-

verter. In order to give the best analog performance and minimize power consumption, pins that

are being used for analog functions must have both their digital outputs and digital inputs dis-

abled. Digital outputs are disabled by putting the port pins into the input-only mode as described

in “Port Configuration” on page 44. The analog input pins will always default to input-only mode

after reset regardless of the state of the Tristate-Port Fuse.

Digital inputs on P2.4, P2.5, P2.6 and P2.7 are disabled whenever an analog comparator is

enabled by setting the CENA or CENB bits in ACSRA and ACSRB and that pin is configured for

input-only mode. To use an analog input pin as a high-impedance digital input while a compara-

tor is enabled, that pin should be configured in open-drain mode and the corresponding port

Digital inputs on Port 0 are disabled for each pin configured for input-only mode whenever the

ADC is enabled by setting the ADCE bit and clearing the DAC bit in DADC. To use any Port 0

input pin as a high-impedance digital input while the ADC is enabled, that pin should be config-

ured in open-drain mode and the corresponding port register bit should be set to 1. When DAC

mode is enabled, P2.2 and P2.3 are forced to input-only mode.

10.3

Port Read-Modify-Write

A read from a port will read either the state of the pins or the state of the port register depending

on which instruction is used. Simple read instructions will always access the port pins directly.

Read-modify-write instructions, which read a value, possibly modify it, and then write it back, will

always access the port register. This includes bit write instructions such as CLR or SETB as they

actually read the entire port, modify a single bit, then write the data back to the entire port. See

Table 10-4 for a complete list of Read-Modify-Write instruction which may access the ports.

Table 10-4.

Port Read-Modify-Write Instructions

Mnemonic

Instruction

Example

ANL

Logical AND

ANL P1, A

ORL

Logical OR

ORL P1, A

XRL

Logical EX-OR

XRL P1, A

JBC

Jump if bit set and clear bit

JBC P3.0, LABEL

CPL

Complement bit

CPL P3.1

INC

Increment

INC P1

DEC

Decrement

DEC P3

DJNZ

Decrement and jump if not zero

DJNZ P3, LABEL

MOV PX.Y, C

Move carry to bit Y of Port X

MOV P1.0, C

CLR PX.Y

Clear bit Y of Port X

CLR P1.1

SETB PX.Y

Set bit Y of Port X

SETB P3.2

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