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PCIMX515CJM6C bảng dữ liệu(PDF) 115 Page - Freescale Semiconductor, Inc |
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PCIMX515CJM6C bảng dữ liệu(HTML) 115 Page - Freescale Semiconductor, Inc |
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115 / 184 page ![]() Electrical Characteristics i.MX51 Applications Processors for Consumer and Industrial Products, Rev. 1 Freescale Semiconductor 115 Preliminary—Subject to Change Without Notice 3.7.12.1 Reset Sequence 3.7.12.1.1 Cards with internal reset The sequence of reset for this kind of SIM Cards is as follows (see Figure 82): • After power up, the clock signal is enabled on SIMx_CLKy(time T0) • After 200 clock cycles, RX must be high. • The card must send a response on RX acknowledging the reset between 400 and 40000 clock cycles after T0. Figure 82. Internal-Reset Card Reset Sequence 3.7.12.1.2 Cards with Active Low Reset The sequence of reset for this kind of card is as follows (see Figure 83): • After power-up, the clock signal is enabled on SIMx_CLKy (time T0) • After 200 clock cycles, SIMx_DATAy_RX_TX must be high. • SIMx_RSTy must remain Low for at least 40000 clock cycles after T0 (no response is to be received on RX during those 40000 clock cycles) • SIMx_RSTy is set High (time T1) • SIMx_RSTy must remain High for at least 40000 clock cycles after T1 and a response must be received on SIMx_DATAy_RX_TX between 400 and 40000 clock cycles after T1. SIMx_SVENy SIMx_CLKy SIMx_DATAy_RX_TX 2 T0 1 response 2 1 < 200 clock cycles < 40000 clock cycles 400 clock cycles < |
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