PCIMX515CJM6C datasheet(53/184 Pages) FREESCALE

tên linh kiện	PCIMX515CJM6C

Giải thích chi tiết về linh kiện	i.MX51 Applications Processors for Consumer and Industrial Products

PDF	184 Pages

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nhà sản xuất	FREESCALE [Freescale Semiconductor, Inc]

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Electrical Characteristics

i.MX51 Applications Processors for Consumer and Industrial Products, Rev. 1

Freescale Semiconductor

Preliminary—Subject to Change Without Notice

3.6.8

SDRAM Controller Timing Parameters

3.6.8.1

Mobile DDR SDRAM Timing Parameters

Figure 29. Mobile DDR SDRAM Basic Timing Parameters

Table 42. Mobile DDR SDRAM Timing Parameter Table

Parameter

Symbol

200 MHz

166 MHz

133 MHz

Unit

Min

Max

Min

Max

Min

Max

DD1

SDRAM clock high-level width

tCH

0.45

0.55

0.45

0.55

0.45

0.55

tCK

DD2

SDRAM clock low-level width

tCL

0.45

0.55

0.45

0.55

0.45

0.55

tCK

DD3

SDRAM clock cycle time

tCK

5—

6—

7.5

—

DD4

CS, RAS, CAS, CKE, WE setup time

tIS1

1 This parameter is affected by pad timing. if the slew rate is < 1 V/ns, 0.2 ns should be added to the value. For cmos65 pads

this is true for medium and low drive strengths.

0.9

—

1.1

—

1.3

—

DD5

CS, RAS, CAS, CKE, WE hold time

tIH1

0.9

—

1.1

—

1.3

—

DD6

Address output setup time

tIS1

0.9

—

1.1

—

1.3

—

DD7

Address output hold time

tIH1

0.9

—

1.1

—

1.3

—

SDCLK

ADDR

ROW/BA

COL/BA

CAS

RAS

DD1

DD3

DD2

DD4

DD5

DD6

DD7

SDCLK

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