PCIMX515CJM6C datasheet(104/184 Pages) FREESCALE

104 / 184 page

i.MX51 Applications Processors for Consumer and Industrial Products, Rev. 1

104

Freescale Semiconductor

Preliminary—Subject to Change Without Notice

Electrical Characteristics

Figure 69 depicts the timing of the PWM, and Table 76 lists the PWM timing parameters.

Figure 69. PWM Timing

3.7.11

P-ATA Timing Parameters

This section describes the timing parameters of the Parallel ATA module which are compliant with

ATA/ATAPI-6 specification.

Parallel ATA module can work on PIO/Multi-Word DMA/Ultra DMA transfer modes. Each transfer mode

has different data transfer rate, Ultra DMA mode 4 data transfer rate is up to 100MB/s. Parallel ATA

module interface consist of a total of 29 pins, Some pins act on different function in different transfer

mode. There are different requirements of timing relationships among the function pins conform with

ATA/ATAPI-6 specification and these requirements are configurable by the ATA module registers.

Table 77 and Figure 70 define the AC characteristics of all the P-ATA interface signals on all data

transfer modes.

Table 76. PWM Output Timing Parameter

Ref. No.

Parameter

Min

Max

Unit

System CLK frequency1

1 CL of PWMO = 30 pF

ipg_clk

MHz

Clock high time

12.29

—

Clock low time

9.91

—

Clock fall time

—

0.5

Clock rise time

—

0.5

Output delay time

—

9.37

Output setup time

8.71

—

System Clock

PWM Output

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