TLC320AD50CSLASHI datasheet(13/54 Pages) TI2

13 / 54 page

1–6

1.6

Definitions and Terminology

ADC Channel

The ADC channel refers to all signal processing circuits between the analog input and the digital

conversion results at DOUT.

Channel Delay

The delay for the analog signal at the ADC input to appear on the digital output. The delay for

the digital value at the DAC input to appear on the analog output.

The alpha character

d represents valid programmed or default data in the control register format

(see Section 3.2) when discussing other data bit portions of the register.

Dxx

Dxx is the bit position in the primary data word (xx is the bit number).

DSxx

DSxx is the bit position in the secondary data word (xx is the bit number).

DAC Channel

DAC channel refers to all signal processing circuits between the digital data word applied to DIN

and the differential output analog signal available at OUTP and OUTM.

Data Transfer

Interval

The time during which data is transferred from DOUT and to DIN. The interval is 16 shift clocks

and the data transfer is initiated by the falling edge of the frame-sync signal.

FIR

Finite duration impulse response

The sampling frequency

Frame Sync and

Sampling Period

Frame sync and sampling period is the time between falling edges of successive primary

frame-sync signals. It is always equal to 256 SCLK.

Frame Sync

Frame sync refers only to the falling edge of the signal that initiates the data transfer interval.

The primary frame sync starts the primary communications, and the secondary frame sync

starts the secondary communications.

Frame-Sync

Interval

The frame-sync interval is the time period occupied by 16 shift clocks. The frame-sync signal

goes high on the seventeenth rising edge of SCLK.

Host

A host is any processing system that interfaces to DIN, DOUT, SCLK, FS, and/or MCLK.

PGA

Programmable gain amplifier

Primary

Communications

Primary communications refers to the digital data transfer interval. Since the device is

synchronous, the signal data words from the ADC channel and to the DAC channel occur

simultaneously.

Secondary

Communications

Secondary communications refers to the digital control and configuration data transfer interval

into DIN and the register read data cycle from DOUT. The data transfer interval occurs when

requested by hardware or software.

Signal Data

This refers to the input signal and all of the converted representations through the ADC channel

and the signal through the DAC channel to the analog output. This is contrasted with the purely

digital software control data.

The alpha character

X represents a don’t care bit-position within the control register format.

TLC320AD50C/I bảng dữ liệu(PDF) 13 Page - Texas Instruments

TLC320AD50C/I bảng dữ liệu(HTML) 13 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54

bảng dữ liệu tải về

Link URL