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HCS08 bảng dữ liệu(PDF) 145 Page - NXP Semiconductors |
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HCS08 bảng dữ liệu(HTML) 145 Page - NXP Semiconductors |
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145 / 198 page ![]() Timer/Pulse-Width Modulator (S08TPMV2) MC9S08QD4 Series MCU Data Sheet, Rev. 6 Freescale Semiconductor 145 11.1.3 Features The TPM has the following features: • Each TPM may be configured for buffered, center-aligned pulse-width modulation (CPWM) on all channels • Clock sources independently selectable per TPM (multiple TPMs device) • Selectable clock sources (device dependent): bus clock, fixed system clock, external pin • Clock prescaler taps for divide by 1, 2, 4, 8, 16, 32, 64, or 128 • 16-bit free-running or up/down (CPWM) count operation • 16-bit modulus register to control counter range • Timer system enable • One interrupt per channel plus a terminal count interrupt for each TPM module (multiple TPMs device) • Channel features: — Each channel may be input capture, output compare, or buffered edge-aligned PWM — Rising-edge, falling-edge, or any-edge input capture trigger — Set, clear, or toggle output compare action — Selectable polarity on PWM outputs 11.1.4 Block Diagram Figure 11-2 shows the structure of a TPM. Some MCUs include more than one TPM, with various numbers of channels. |
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