HCS08 datasheet(71/198 Pages) NXP

71 / 198 page

Chapter 6 Parallel Input/Output Control

MC9S08QD4 Series MCU Data Sheet, Rev. 6

Freescale Semiconductor

6.4.2.1

Port A Internal Pullup Enable (PTAPE)

An internal pullup device can be enabled for each port pin by setting the corresponding bit in the pullup

enable register (PTAPEn). The pullup device is disabled if the pin is configured as an output by the parallel

I/O control logic or any shared peripheral function regardless of the state of the corresponding pullup

enable register bit. The pullup device is also disabled if the pin is controlled by an analog function.

6.4.2.2

Port A Slew Rate Enable (PTASE)

Slew rate control can be enabled for each port pin by setting the corresponding bit in the slew rate control

reduce EMC emissions. Slew rate control has no effect on pins which are configured as inputs.

321

PTAPE5

PTAPE41

PTAPE3

PTAPE2

PTAPE1

PTAPE0

Reset:

000

1 PTAPE4 has no effect on the output-only PTA4 pin.

Figure 6-4. Internal Pullup Enable for Port A Register (PTAPE)

Table 6-3. PTAPE Register Field Descriptions

Field

Description

5:0

PTAPE[5:0]

Internal Pullup Enable for Port A Bits — Each of these control bits determines if the internal pullup device is

enabled for the associated PTA pin. For port A pins that are configured as outputs, these bits have no effect and

the internal pullup devices are disabled.

0 Internal pullup device disabled for port A bit n.

1 Internal pullup device enabled for port A bit n.

321

PTASE51

PTASE4

PTASE3

PTASE2

PTASE1

PTASE0

Reset:

001

111

1 PTASE5 has no effect on the input-only PTA5 pin.

Figure 6-5. Slew Rate Enable for Port A Register (PTASE)

Table 6-4. PTASE Register Field Descriptions

Field

Description

5:0

PTASE[5:0]

Output Slew Rate Enable for Port A Bits — Each of these control bits determines if the output slew rate control

is enabled for the associated PTA pin. For port A pins that are configured as inputs, these bits have no effect.

0 Output slew rate control disabled for port A bit n.

1 Output slew rate control enabled for port A bit n.

HCS08 bảng dữ liệu(PDF) 71 Page - NXP Semiconductors

HCS08 bảng dữ liệu(HTML) 71 Page - NXP Semiconductors

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

bảng dữ liệu tải về

Link URL