HCS08 datasheet(27/198 Pages) NXP

27 / 198 page

Chapter 3 Modes of Operation

MC9S08QD4 Series MCU Data Sheet, Rev. 6

Freescale Semiconductor

the CPU executes a STOP instruction, the MCU will not enter either of the stop modes and an illegal

opcode reset is forced. The stop modes are selected by setting the appropriate bits in SPMSC2.

HCS08 devices that are designed for low voltage operation (1.8V to 3.6V) also include stop1 mode. The

MC9S08QD4 series does not include stop1 mode.

Table 3-1 summarizes the behavior of the MCU in each of the stop modes.

3.6.1

Stop2 Mode

The stop2 mode provides very low standby power consumption and maintains the contents of RAM and

the current state of all of the I/O pins. To enter stop2, the user must execute a STOP instruction with stop2

selected (PPDC = 1) and stop mode enabled (STOPE = 1). In addition, the LVD must not be enabled to

operate in stop (LVDSE = 0 or LVDE = 0). If the LVD is enabled in stop, then the MCU enters stop3 upon

the execution of the STOP instruction regardless of the state of PPDC.

Before entering stop2 mode, the user must save the contents of the I/O port registers, as well as any other

memory-mapped registers which they want to restore after exit of stop2, to locations in RAM. Upon exit

of stop2, these values can be restored by user software before pin latches are opened.

When the MCU is in stop2 mode, all internal circuits that are powered from the voltage regulator are turned

off, except for the RAM. The voltage regulator is in a low-power standby state, as is the ADC. Upon entry

into stop2, the states of the I/O pins are latched. The states are held while in stop2 mode and after exiting

stop2 mode until a logic 1 is written to PPDACK in SPMSC2.

Exit from stop2 is done by asserting either of the wake-up pins: RESET or IRQ, or by an RTI interrupt.

IRQ is always an active low input when the MCU is in stop2, regardless of how it was configured before

entering stop2.

NOTE

Although this IRQ pin is automatically configured as active low input, the

pullup associated with the IRQ pin is not automatically enabled. Therefore,

if an external pullup is not used, the internal pullup must be enabled by

setting IRQPE in IRQSC.

Upon wake-up from stop2 mode, the MCU will start up as from a power-on reset (POR) except pin states

remain latched. The CPU will take the reset vector. The system and all peripherals will be in their default

reset states and must be initialized.

Table 3-1. Stop Mode Behavior

Mode

PPDC

CPU, Digital

Peripherals,

Flash

RAM

ICS

ADC1

Regulator

I/O Pins

RTI

Stop2

Off

Standby

Off

Disabled

Standby

States held

Optionally on

Stop3

Standby

Off1

1 ICS can be configured to run in stop3. Please see the ICS registers.

Optionally on

Standby

States held

Optionally on

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