HCS08 datasheet(113/198 Pages) NXP

113 / 198 page

Analog-to-Digital Converter (S08ADC10V1)

MC9S08QD4 Series MCU Data Sheet, Rev. 6

Freescale Semiconductor

113

8.4.7.2

Stop3 Mode With ADACK Enabled

If ADACK is selected as the conversion clock, the ADC continues operation during stop3 mode. For

guaranteed ADC operation, the MCU’s voltage regulator must remain active during stop3 mode. Consult

the module introduction for configuration information for this MCU.

If a conversion is in progress when the MCU enters stop3 mode, it continues until completion. Conversions

can be initiated while the MCU is in stop3 mode by means of the hardware trigger or if continuous

conversions are enabled.

A conversion complete event sets the COCO and generates an ADC interrupt to wake the MCU from stop3

mode if the ADC interrupt is enabled (AIEN = 1).

NOTE

It is possible for the ADC module to wake the system from low power stop

and cause the MCU to begin consuming run-level currents without

generating a system level interrupt. To prevent this scenario, software must

ensure that the data transfer blocking mechanism (discussed in

Section 8.4.4.2, “Completing Conversions,”) is cleared when entering stop3

and continuing ADC conversions.

8.4.8

MCU Stop1 and Stop2 Mode Operation

The ADC module is automatically disabled when the MCU enters either stop1 or stop2 mode. All module

registers contain their reset values following exit from stop1 or stop2. Therefore the module must be

re-enabled and re-configured following exit from stop1 or stop2.

8.5

Initialization Information

This section gives an example which provides some basic direction on how a user would initialize and

configure the ADC module. The user has the flexibility of choosing between configuring the module for

8-bit or 10-bit resolution, single or continuous conversion, and a polled or interrupt approach, among many

other options. Refer to Table 8-6, Table 8-7, and Table 8-8 for information used in this example.

NOTE

Hexadecimal values designated by a preceding 0x, binary values designated

by a preceding %, and decimal values have no preceding character.

8.5.1

ADC Module Initialization Example

8.5.1.1

Initialization Sequence

Before the ADC module can be used to complete conversions, an initialization procedure must be

performed. A typical sequence is as follows:

1. Update the configuration register (ADCCFG) to select the input clock source and the divide ratio

used to generate the internal clock, ADCK. This register is also used for selecting sample time and

low-power configuration.

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