HCS08 datasheet(168/198 Pages) NXP

168 / 198 page

Development Support

MC9S08QD4 Series MCU Data Sheet, Rev. 6

168

Freescale Semiconductor

This section refers to registers and control bits only by their names. A Freescale-provided equate or header

file is used to translate these names into the appropriate absolute addresses.

12.3.1

BDC Registers and Control Bits

The BDC has two registers:

•

The BDC status and control register (BDCSCR) is an 8-bit register containing control and status

bits for the background debug controller.

•

The BDC breakpoint match register (BDCBKPT) holds a 16-bit breakpoint match address.

These registers are accessed with dedicated serial BDC commands and are not located in the memory

space of the target MCU (so they do not have addresses and cannot be accessed by user programs).

Some of the bits in the BDCSCR have write limitations; otherwise, these registers may be read or written

at any time. For example, the ENBDM control bit may not be written while the MCU is in active

background mode. (This prevents the ambiguous condition of the control bit forbidding active background

mode while the MCU is already in active background mode.) Also, the four status bits (BDMACT, WS,

WSF, and DVF) are read-only status indicators and can never be written by the WRITE_CONTROL serial

BDC command. The clock switch (CLKSW) control bit may be read or written at any time.

HCS08 bảng dữ liệu(PDF) 168 Page - NXP Semiconductors