HCS08 datasheet(161/198 Pages) NXP

161 / 198 page

Development Support

MC9S08QD4 Series MCU Data Sheet, Rev. 6

Freescale Semiconductor

161

Figure 12-1. BDM Tool Connector

12.2.1

BKGD Pin Description

BKGD is the single-wire background debug interface pin. The primary function of this pin is for

bidirectional serial communication of active background mode commands and data. During reset, this pin

is used to select between starting in active background mode or starting the user’s application program.

This pin is also used to request a timed sync response pulse to allow a host development tool to determine

the correct clock frequency for background debug serial communications.

BDC serial communications use a custom serial protocol first introduced on the M68HC12 Family of

microcontrollers. This protocol assumes the host knows the communication clock rate that is determined

by the target BDC clock rate. All communication is initiated and controlled by the host that drives a

high-to-low edge to signal the beginning of each bit time. Commands and data are sent most significant

bit first (MSB first). For a detailed description of the communications protocol, refer to Section 12.2.2,

“Communication Details.”

If a host is attempting to communicate with a target MCU that has an unknown BDC clock rate, a SYNC

command may be sent to the target MCU to request a timed sync response signal from which the host can

determine the correct communication speed.

BKGD is a pseudo-open-drain pin and there is an on-chip pullup so no external pullup resistor is required.

Unlike typical open-drain pins, the external RC time constant on this pin, which is influenced by external

capacitance, plays almost no role in signal rise time. The custom protocol provides for brief, actively

driven speedup pulses to force rapid rise times on this pin without risking harmful drive level conflicts.

Refer to Section 12.2.2, “Communication Details,” for more detail.

When no debugger pod is connected to the 6-pin BDM interface connector, the internal pullup on BKGD

chooses normal operating mode. When a debug pod is connected to BKGD it is possible to force the MCU

into active background mode after reset. The specific conditions for forcing active background depend

upon the HCS08 derivative (refer to the introduction to this Development Support section). It is not

necessary to reset the target MCU to communicate with it through the background debug interface.

12.2.2

Communication Details

The BDC serial interface requires the external controller to generate a falling edge on the BKGD pin to

indicate the start of each bit time. The external controller provides this falling edge whether data is

transmitted or received.

BKGD is a pseudo-open-drain pin that can be driven either by an external controller or by the MCU. Data

is transferred MSB first at 16 BDC clock cycles per bit (nominal speed). The interface times out if

512 BDC clock cycles occur between falling edges from the host. Any BDC command that was in progress

NO CONNECT 5

NO CONNECT 3

RESET

BKGD

GND

VDD

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