EM78P311SXSSLASHXJ datasheet(11/68 Pages) EMC

11 / 68 page

EM78P311N

8-Bit Microcontroller

Product Specification (V1.0) 10.02.2006

• 7

(This specification is subject to change without further notice)

Bit 3 (P):

Power down bit. Set to “1” during power on or by a "WDTC" command and

reset to “0” by a "SLEP" command.

Bit 2 (Z):

Zero flag. Set to "1" if the result of an arithmetic or logic operation is

zero.

Bit 1 (DC) :

Auxiliary carry flag

Bit 0 (C) :

Carry flag

R4 (RAM Select Register)

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

GRBS1

RBS0

RSR5

RSR4

RSR3

RSR2

RSR1

RSR0

Bit 7: 6 ( GRBS1: GRBS0 ):

determine which general purpose banks are activated

among the two banks. Use BANK instruction (e.g. BABK 1) to change bank.

GRBS1

GRBS0

General Purpose Register Bank (Address 20H ~ 3FH)

Bank 0

Bank 1

Bit 5: 0 ( RSR5 : RSR0 ):

used to select the registers (Address: 00h~3Fh) in indirect

addressing mode. If no indirect addressing is used, the RSR can be used as

an 8-bit general-purpose read/write register. See the data memory

configuration in Fig. 5-2.

R5 (System Control Register)

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

PS0

SIS

REM

Bit 4 (PS0):

ROM Page select bits. User can use PAGE instruction (e.g. PAGE 1) or set

PS0 bits to change the ROM page. When executing a "JMP", "CALL", or other

instructions which cause the program counter to change (e.g. MOV R2, A),

PS0 are loaded into the 11th bit of the program counter and select one of the

available program memory pages. Note that RET (RETL, RETI) instruction

does not change the PS0 bits. That is, return will always be to the page from

where the subroutine was called, regardless of the PS0 bits current setting.

PS0

Program Memory Page [Address]

Page 0 [0000~03FF]

Page 1 [0400~07FF]

Bit 1 ( SIS ) :

Sleep and Idle mode select

SIS = “0” :

Idle mode

SIS = “1” :

Sleep mode

Bit 0 ( REM )

: Release method for sleep mode

REM = “0” :

/SLEEP pin input rising edge released

REM = “1” :

/SLEEP pin input “H” level released

EM78P311SXS/XJ bảng dữ liệu(PDF) 11 Page - ELAN Microelectronics Corp

EM78P311SXS/XJ bảng dữ liệu(HTML) 11 Page - ELAN Microelectronics Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68

bảng dữ liệu tải về

Link URL