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AM79C940KC/W bảng dữ liệu(PDF) 61 Page - Advanced Micro Devices

tên linh kiện AM79C940KC/W
Giải thích chi tiết về linh kiện  Media Access Controller for Ethernet (MACE??
PDF  144 Pages
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nhà sản xuất  AMD [Advanced Micro Devices]
Trang chủ  http://www.amd.com
Logo AMD - Advanced Micro Devices

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Am79C940
61
to the inability of the host/con-
troller to read data fast enough
to keep pace with the receive se-
rial bit stream and the latency
provided by the Receive FIFO it-
self. OFLO is indicated on the re-
ceive frame that caused the
overflow
condition;
complete
frames in the Receive FIFO are
not affected. While the Receive
FIFO is in the overflow condition,
it ignores additional receive data
on the network. The internal ad-
dress detect logic will continue
to operate and the Missed Pack-
et Count (MPC in register 24) will
be incremented for each packet
which passes the address match
criteria, and complete without
collision.
Bit 6
CLSN
Collision Flag. Indicates that the
receive operation suffered a col-
lision during reception of the
frame. If CLSN is set, it indicates
that the receive frame suffered a
late collision, since a frame ex-
periencing collision within the
slot time will be automatically
deleted from the RCVFIFO (pro-
viding LLRCV in the Receive
Frame
Control
register
is
cleared). Note that if the LLRCV
bit is enabled, the late collision
threshold is effectively moved
from the normal 64–byte (512–
bit) level to the 12-byte (96–bit)
level. Runt packets suffering a
collision will be flushed from the
RCVFIFO
regardless
of
the
state of the RPA bit (User Test
Register). CLSN will not be set if
OFLO is set.
Bit 5
FRAM
Framing Error flag. Indicates
that
the
received
frame
contained a non-integer multiple
of bytes and an FCS error. If
there was no FCS error then
FRAM will not be set. FRAM is
not
valid
during
internal
loopback. FRAM will not be set if
OFLO is set.
Bit 4
FCS
FCS Error flag. Indicates that
there is an FCS error in the
frame.
The
receive
FCS
is
computed and checked normally
when ASTRP RCV = 1, but is not
passed to the host. FCS will not
be set if OFLO is set.
Bit 3-0
RCVCNT
The Receive Message Byte
[11:8]
Count indicates the number of
whole bytes in the received
message
from
the
network.
RCVCNT is 12 bits long, and
valid (accurate) only when there
are no errors reported in the
Receive Status (RCVSTS). If a
late collision is detected (CLSN
set in RCVSTS), the count is an
indication of the length (in byte
times) of the duration of the
receive activity including the
collision. RCVCNT [7:0] corre-
spond to bits 7-0 in RFS0 of the
Receive
Frame
Status.
RCVCNT [11–0} will be invalid
when OFLO is set.
RFS2—Runt Packet Count (RNTPC)
Bit
Name
Description
Bit 7-0
RNTPC
The
Runt
Packet
Count
indicates
[7–0]
the number of runt packets
received,
addressed
to
this
node, since the last successfully
received packet. The value does
not roll over after 255 runt
packets have been detected,
and will remain frozen at the
maximum count.
RFS3—Receive Collision Count (RCVCC)
Bit
Name
Description
Bit 7–0 RCVCC
The Receive Collision Count in-
[7–0]
dicates the number of collisions
detected on the network since
the last successfully received
packet. The value does not roll
over after 255 collisions have
been detected, and will remain
frozen at the maximum count.
FIFO Frame Count (FIFOFC)
(REG ADDR 7)
Bit
Name
Description
Bit 7–4
RCVFC
Receive
Frame
Count.
The
(read
[3–0]
only) count of the frames in the
Receive FIFO. A frame is count-
ed when the last byte is put in
the FIFO. The counter is decre-
mented when the last byte of the
frame is read. If the RCVFC
reaches its maximum value of
RNTPC [7–0]
RCVCC [7–0]
RCVFC[3–0]
XMTFC[3–0]



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