M68HC05 datasheet(18/118 Pages) FREESCALE

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General Description

MC68HC05C9A Advance Information Data Sheet, Rev. 4.1

Freescale Semiconductor

1.5 Software-Programmable Options (MC68HC05C9A Mode Only)

The C9A option register (OR), shown in Figure 1-4, is enabled only if configured in C9A mode. This

•

Map two different areas of memory between RAM and EPROM, one of 48 bytes and one of 128

bytes

•

Edge-triggered only or edge- and level-triggered external interrupt (IRQ pin and any port B pin

configured for interrupt)

This register must be written to by user software during operation of the microcontroller.

RAM0 — Random Access Memory Control Bit 0

This read/write bit selects between RAM or EPROM in location $0020 to $004F. This bit can be read

or written at any time.

1 = RAM selected

0 = EPROM selected

RAM1— Random Access Memory Control Bit 1

This read/write bit selects between RAM or EPROM in location $0100 to $017F. This bit can be read

or written at any time.

1 = RAM selected

0 = EPROM selected

IRQ — Interrupt Request Bit

This bit selects between an edge-triggered only or edge- and level- triggered external interrupt pin.

This bit is set by reset, but can be cleared by software. This bit can be written only once.

1 = Edge and level interrupt option selected

0 = Edge-only interrupt option selected

$3FDF

Bit 7

654321

Bit 0

Read:

RAM0

RAM1

IRQ

Write:

Reset:

00000010

= Unimplemented

Figure 1-4. C9A Option Register

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