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M68HC05 bảng dữ liệu(PDF) 36 Page - Freescale Semiconductor, Inc |
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M68HC05 bảng dữ liệu(HTML) 36 Page - Freescale Semiconductor, Inc |
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36 / 118 page ![]() Interrupts MC68HC05C9A Advance Information Data Sheet, Rev. 4.1 36 Freescale Semiconductor 4.3 External Interrupt (IRQ or Port B) If the interrupt mask bit (I bit) of the CCR is set, all maskable interrupts (internal and external) are disabled. Clearing the I bit enables interrupts. The interrupt request is latched immediately following the falling edge of IRQ. It is then synchronized internally and serviced as specified by the contents of $3FFA and $3FFB. When any of the port B pullups are enabled, each pin becomes an additional external interrupt source which is executed identically to the IRQ pin. Port B interrupts follow the same edge/edge-level selection as the IRQ pin. The branch instructions BIL and BIH also respond to the port B interrupts in the same way as the IRQ pin. See 7.3 Port B. Either a level-sensitive and edge-sensitive trigger or an edge-sensitive-only trigger operation is selectable. In MC68HC05C9A mode, the sensitivity is software controlled by the IRQ bit in the C9A option register ($3FDF). In the MC68HC05C12A mode, the sensitivity is determined by the C12IRQ bit in the C12 mask option register ($3FF1). NOTE The internal interrupt latch is cleared in the first part of the interrupt service routine; therefore, one external interrupt pulse can be latched and serviced as soon as the I bit is cleared. Table 4-1. Vector Addresses for Interrupts and Resets Function Source Local Mask Global Mask Priority (1 = Highest) Vector Address Reset Power-on reset None None 1 $3FFE–$3FFF RESET pin COP watchdog Software interrupt (SWI) User code None None Same priority as instruction $3FFC–$3FFD External interrupt IRQ pin port B pins None I bit 2 $3FFA–$3FFB Timer interrupts ICF bit ICIE bit I bit 3 $3FF8–$3FF9 OCF bit OCIE bit TOF bit TOIE bit SCI interrupts TDRE bit TCIE bit I bit 4 $3FF6–$3FF7 TC bit RDRF bit RIE bit OR bit IDLE bit ILIE bit SPI interrupts SPIF bit SPIE I bit 5 $3FF4–$3FF5 MODF bit |
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