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M68HC05 bảng dữ liệu(PDF) 98 Page - Freescale Semiconductor, Inc |
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M68HC05 bảng dữ liệu(HTML) 98 Page - Freescale Semiconductor, Inc |
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98 / 118 page ![]() Electrical Specifications MC68HC05C9A Advance Information Data Sheet, Rev. 4.1 98 Freescale Semiconductor 12.7 5.0-Vdc Control Timing Characteristic(1) 1. V DD = 5.0 Vdc ± 10%, VSS = 0 Vdc, TA = –40 to +85 °C, unless otherwise noted Symbol Min Max Unit Frequency of operation Crystal External clock fOSC — DC 4.2 4.2 MHz Internal pperating frequency (fOSC ÷ 2) Crystal External clock fOP — DC 2.1 2.1 MHz Cycle time tCYC 480 — ns Crystal oscillator startup time tOXOV —100 ms Stop recovery startup time (crystal oscillator) tILCH —100 ms RESET pulse width tRL 1.5 — tCYC Timer Resolution(2) Input capture pulse width Input capture pulse period 2. Because a 2-bit prescaler in the timer must count four internal cycles (t CYC), this is the limiting minimum factor in determining the timer resolution. tRESL tTH, tTL tTLTL 4.0 125 (3) 3. The minimum period t TLTL should not be less than the number of cycle times it takes to execute the capture interrupt service routine plus 24 t CYC. — — — tCYC ns tCYC Interrupt pulse width low (edge-triggered) tILIH 125 — ns Interrupt pulse period tILIL (4) 4. The minimum t ILIL should not be less than the number of cycle times it takes to execute the interrupt service routine plus 19 t CYC. — tCYC OSC1 pulse width tOH,tOL 90 — ns |
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