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M68HC05 bảng dữ liệu(PDF) 34 Page - Freescale Semiconductor, Inc |
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M68HC05 bảng dữ liệu(HTML) 34 Page - Freescale Semiconductor, Inc |
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34 / 118 page ![]() Central Processor Unit (CPU) MC68HC05C9A Advance Information Data Sheet, Rev. 4.1 34 Freescale Semiconductor 3.2.1 Accumulator (A) The accumulator is a general-purpose 8-bit register used to hold operands and results of arithmetic calculations or data manipulations. 3.2.2 Index Register (X) The index register is an 8-bit register used for the indexed addressing value to create an effective address. The index register may also be used as a temporary storage area. 3.2.3 Program Counter (PC) The program counter is a 16-bit register that contains the address of the next byte to be fetched. 3.2.4 Stack Pointer (SP) The stack pointer contains the address of the next free location on the stack. During an MCU reset or the reset stack pointer (RSP) instruction, the stack pointer is set to location $0FF. The stack pointer is then decremented as data is pushed onto the stack and incremented as data is pulled from the stack. When accessing memory, the eight most significant bits are permanently set to 00000011. These eight bits are appended to the six least significant register bits to produce an address within the range of $00FF to $00C0. Subroutines and interrupts may use up to 64 (decimal) locations. If 64 locations are exceeded, the stack pointer wraps around and loses the previously stored information. A subroutine call occupies two locations on the stack; an interrupt uses five locations. 3.2.5 Condition Code Register (CCR) The CCR is a 5-bit register in which four bits are used to indicate the results of the instruction just executed, and the fifth bit indicates whether interrupts are masked. These bits can be individually tested by a program, and specific actions can be taken as a result of their state. Each bit is explained in the following paragraphs. Half Carry (H) This bit is set during ADD and ADC operations to indicate that a carry occurred between bits 3 and 4. Interrupt (I) When this bit is set, the timer, SCI, SPI, and external interrupt are masked (disabled). If an interrupt occurs while this bit is set, the interrupt is latched and processed as soon as the interrupt bit is cleared. Negative (N) When set, this bit indicates that the result of the last arithmetic, logical, or data manipulation was negative. Zero (Z) When set, this bit indicates that the result of the last arithmetic, logical, or data manipulation was zero. Carry/Borrow (C) When set, this bit indicates that a carry or borrow out of the arithmetic logical unit (ALU) occurred during the last arithmetic operation. This bit is also affected during bit test and branch instructions and during shifts and rotates. |
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