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CYT4DNJBJS bảng dữ liệu(PDF) 122 Page - Infineon Technologies AG |
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CYT4DNJBJS bảng dữ liệu(HTML) 122 Page - Infineon Technologies AG |
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122 / 209 page ![]() Datasheet 122 002-24601 Rev. *I 2023-02-14 TRAVEO™ T2G 32-bit Automotive MCU Based on Arm® Cortex®-M7 dual Electrical specifications Figure 26-5 Integral and differential linearity errors Figure 26-6 ADC equivalent circuit for analog input 0xFFF 0xFFE 0xFFD 0x001 0x002 0x003 Analog input VREFL Actual conversion characteristics Actual conversion characteristics Ideal characteristics VNT (Measured value) N + 1 N -2 N - 1 N Analog input VREFL VREFH VREFH Integral linearity error Differential linearity error (1 LSb [N - 1] + VZT) VFST (Measured value) 0x004 VZT (Measured value) Actual conversion characteristics Ideal characteristics Actual conversion characteristics VNT (Measured value) V(N+ 1)T (Measured value) Integral linearity error of digital output N = (VNT – {1 LSb × (N – 1) + VZT}) / 1 LSb [LSb] Differential linearity error of digital output N = (V(N + 1)T – VNT – 1 LSb ) / 1 LSb [LSb] 1 LSb = (VFST – VZT ) / 4094 [V] VZT: Voltage for which digital output changes from 0x000 to 0x001 VFST: Voltage for which digital output changes from 0xFFE to 0xFFF. REXT VDDIO CEXT CIN RVIN CVIN EXTERNAL CIRCUIT INTERNAL EQUIVALENT CIRCUIT ESD Protection Channel selection MUX and ADC REXT: Source impedance CEXT: On-PCB capacitance CIN: I/O pad or Input capacitance RVIN: ADC equivalent input resistance CVIN: ADC equivalent input capacitance K: Constant for sampling accuracy, K = ln(abs(4096/LSbSAMPLE)) Sampling Time (tSAMPLE) requirement is shown in the following equation tSAMPLE > K x { CVIN x ( RVIN + REXT ) + ( CIN + CEXT ) x (REXT) } [seconds] K = 9.0" is recommended to get ±0.5 LSB sampling accuracy at 12-bit (LSbSAMPLE = ±0.5) |
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