MPC821 datasheet(196/242 Pages) NXP

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MPC860TFADS Daughter Board Design Specification—Rev 0.1

MOTOROLA

PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE

5•1•3

P7 - LCD Panel Connector Interconnect Signals

The LCD Panel connector is a 40 pin (2 X 20) header connector, which is compatible with the LCD

panel connector, existed on the MPC821ADS To allow convenient migration for MPC821 users, the

signal are assigned in a way that allows for panels that were connected to the MPC821ADS, to be

connected directly. The signals of P7 are described in TABLE 5-8. "P7 Interconnect Signals" below:

COMMON_I

TABLE 5-8. P7 Interconnect Signals

Pin No.

Signal Name

Attribute

Description

SHIFT_C

I/O

LCD Shift Clock.

GND

LOE

I/O

Output Enable for TFT displays or Passive panels LCD_AC~

signal.

GND

HSYNC

I/O

Display Line beginning mark.

GND

VSYNC

I/O

New Frame beginning mark.

GND

LD0

I/O

LCD Data Line 0.

GND

LD1

I/O

LCD Data Line 1.

GND

LD2

I/O

LCD Data Line 2.

GND

LD3

I/O

LCD Data Line 3.

GND

LD4

I/O

LCD Data Line 4.

GND

TABLE 5-7. P9 Interconnect Signal

Pin No.

Signal Name

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

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