S32K310 datasheet(131/137 Pages) NXP

131 / 137 page

Rev 2, Aug 2021

• Added section "Overview".

• In block diagrams:

— S32K311/S32K312/S32K314 removed "Scalable ARM M7 core in Lock step" and added "Single ARM M7 core".

— S32K322/S32K324 removed "Scalable ARM M7 core in Lock step" and added "Two independent ARM M7 cores".

• In "Absolute maximum ratings" and "Voltage and current operating requirements":

— Some general footnotes are moved to top of table

— VDD_HV_SMPS added footnotes

• In "Voltage and current operating requirements" for VREFH extended footnote "VREFH should always be equal to...".

• Updated title - Power management system - S32K344, S32K324, S32K341, S32K314, S32K342, and S32K322.

• In figure "Power management system - S32K358" updated double bond to triple bond.

• In section "Recommended Decoupling Capacitors" added COUT_V11 with typ as 1 uF.

• Added section "Power mode transition operating behaviors" and its subsections:

— Power mode transition operating behaviour

— Boot time, HSE firmware not installed

— Boot time, HSE firmware installed

— HSE firmware memory verification time examples

• Moved information from "Supply monitoring" to "Supply diagnosos" and attached it to "AN_ACC". The information is "If

V15 > VDD_HV_A +100mV then..."

• Updated figure "Package decoupling capacitor pinout diagram" to add 289 MapBGA

• In section "Glitch Filter", added sentence ".... WKPU pins and TRGMUX inputs 60-63.".

• Section "Flash memory program and erase specifications" updated thoroughly.

• In section "Flash memory module life specifications" removed footnotes 1 and 2.

• In section "Data retention vs program/erase cycles" added sentence before related to figure "The spec window

represents qualified limits.".

• In section "Flash memory AC timing specifications":

— Updated register naming representation

— Added footnote to tdrcv min as " In extreme cases (1 block configurations)...".

— Max updated to "50 system clock periods" for taistop

• Ins ection "Flash memory read timing parameters" mantioned part numbers for each table as applicable.

• >In section "SAR ADC", for Symbol "fAD_CK" added new spec and max updated to 120.

• In section "FIRC", Symbol "IFIRC" is deleted.

• In section "SIRC", Symbol "Ivdda" with condition "On state" is deleted.

• In section "PLL", clarification added in condition column for jitter specifications.

• In section "Fast External Oscillator (FXOSC)", for Symbol "FREQ_BYPASS", "TRF_BYPASS" and

"CLKIN_DUTY_BYPASS" footnote added "For bypass mode applications, the EXTAL ...".

• In section "Fast External Oscillator (FXOSC)", for Symbol "TFXOSC" footnote added "The startup time specification is

valid ...".

NXP Semiconductors

Revision history

S32K3xx Data Sheet, Rev. 5.2, 10/2022

Data Sheet: Technical Data

Preliminary Information

131 / 137

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