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S32K310 bảng dữ liệu(PDF) 101 Page - NXP Semiconductors |
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S32K310 bảng dữ liệu(HTML) 101 Page - NXP Semiconductors |
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101 / 137 page ![]() Table 43. SAI Electrical Characteristics, Slave Mode (continued) Symbol Description Min Typ Max Unit Condition Spec Number S19 SAI_FS input setup before SAI_BCLK 8 — — ns — — S20 SAI_FS input hold after SAI_BCLK 2 — — ns — — S21 SAI_BCLK to SAI_FS output valid — — 28 ns — — S22 SAI_BCLK to SAI_FS output invalid 0 — — ns — — 1. The slave mode parameters (S15 - S22) assume 50% duty cycle on SAI_BCLK input. Any change in SAI_BCLK duty cycle input must be taken care during the board design or by the master timing. Figure 42. SAI slave mode 12.4.2 SAI Electrical Characteristics, Master Mode The following table describes the SAI electrical characteristics. Measurements are with maximum output load of 30pF, input transition of 1ns and pad configured with DSE = 1'b1 and SRE = 1'b 0. I/O operating voltage ranges from 2.97 V to 3.63 V. Table 44. SAI Electrical Characteristics, Master Mode Symbol Description Min Typ Max Unit Condition Spec Number S1 SAI_MCLK cycle time 40 — — ns — — S2 SAI_MCLK pulse width high/low 45 — 55 % — — S3 SAI_BCLK cycle time 80 — — ns — — Table continues on the next page... NXP Semiconductors Communication interfaces S32K3xx Data Sheet, Rev. 5.2, 10/2022 Data Sheet: Technical Data Preliminary Information 101 / 137 |
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