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PS37044AJOFDDFR bảng dữ liệu(PDF) 10 Page - Texas Instruments

tên linh kiện PS37044AJOFDDFR
Giải thích chi tiết về linh kiện  TPS3704x Quad, Triple, Dual, Single Window or Standard Voltage Supervisor
PDF  34 Pages
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nhà sản xuất  TI [Texas Instruments]
Trang chủ  http://www.ti.com
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PS37044AJOFDDFR bảng dữ liệu(HTML) 10 Page - Texas Instruments

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VIT
Hysteresis
Hysteresis
tSTRT + tD
VPOR
UVLO
VDD(MIN)
VDD
SENSEx
VIT+(OV)
VIT+(OV) - VHYS
VIT-(UV) + VHYS
VIT-(UV)
RESETx
tPD
tD
tD
UVLO - UVLO(HYS)
*See
Note C
(-O: open-drain)
tPD
A.
Open-Drain timing diagram assumes the RESETx / RESETx pin is connected via an external pull-up resistor to VDD.
B.
Be advised that Figure 7-2 shows the VDD falling slew rate is slow or the VDD decay time is much larger than the propagation detect delay (tPD) time.
C.
RESETx/RESETx is asserted after a time delay, typical value of 100 μs, when VDD goes below the UVLO-UVLO(HYS) threshold.
Figure 7-2. SENSEx Timing Diagram
TPS3704
SNVSBZ2B – MARCH 2021 – REVISED DECEMBER 2021
www.ti.com
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Product Folder Links: TPS3704



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