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PS37044AJOFDDFR bảng dữ liệu(PDF) 5 Page - Texas Instruments

tên linh kiện PS37044AJOFDDFR
Giải thích chi tiết về linh kiện  TPS3704x Quad, Triple, Dual, Single Window or Standard Voltage Supervisor
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PS37044AJOFDDFR bảng dữ liệu(HTML) 5 Page - Texas Instruments

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Table 6-1. Pin Functions
PIN
I/O
DESCRIPTION
NAME
TPS37041 TPS37042 TPS37043 TPS37044
VDD
1
1
1
1
I
Supply Input. Bypass with a 0.1 µF capacitor to GND.
SENSE1
2
2
2
2
I
Connect directly to monitored voltage. RESET1/RESET1 is asserted when
SENSE1 falls outside of window threshold. No external capacitor is required
for this SENSE1 pin. For TPS37044 (quad version) RESET1/RESET1
asserts when either SENSE1 or SENSE2 falls outside of window threshold.
For noisy applications, placing a 10 nF to 100 nF ceramic capacitor close
to this pin may be needed for optimum performance. If the input pin is not
being used, it can be left floating.
SENSE2
-
3
3
3
I
Connect directly to monitored voltage. RESET2/RESET2 is asserted when
SENSE2 falls outside of window threshold. No external capacitor is required
for SENSE2 pin. For TPS37044 (quad version) RESET1/RESET1 asserts
when either SENSE1 or SENSE2 falls outside of window threshold. For
noisy applications, placing a 10 nF to 100 nF ceramic capacitor close to this
pin may be needed for optimum performance. If the input pin is not being
used, it can be left floating.
SENSE3
-
-
5
5
I
Connect directly to monitored voltage. RESET3/RESET3 is asserted when
SENSE3 falls outside of window threshold. No external capacitor is required
for SENSE3 pin. For TPS37044 (quad version) RESET2/RESET2 asserts
when either SENSE3 or SENSE4 falls outside of window threshold. For
noisy applications, placing a 10 nF to 100 nF ceramic capacitor close to this
pin may be needed for optimum performance. If the input pin is not being
used, it can be left floating.
SENSE4
-
-
-
6
I
Connect directly to monitored voltage. For TPS37044 (quad version)
RESET2/RESET2 asserts when either SENSE3 or SENSE4 falls outside of
window threshold. For noisy applications, placing a 10 nF to 100 nF ceramic
capacitor close to this pin may be needed for optimum performance. If the
input pin is not being used, it can be left floating.
RESET1
/
RESET1
8
8
8
8
O
RESET1/RESET1 asserts when SENSE1 falls outside of the over-voltage or
under-voltage threshold window.
RESET1/RESET1 stays asserted for the reset timeout period after SENSE1
fall back within the window threshold. Active-low, open-drain reset output,
requires an external pullup resistor. For TPS37044, RESET1/RESET1
asserts when either SENSE1 or SENSE2 fall outside of the window
threshold. The pin can be left floating if it is unused.
RESET2
/
RESET2
-
7
7
7
O
RESET2/RESET2 asserts when SENSE2 falls outside of the overvoltage or
undervoltage threshold window.
RESET2/RESET2 stays asserted for the reset timeout period after SENSE2
fall back within the window threshold. Active-low, open-drain reset output,
requires an external pullup resistor. For TPS37044, RESET2/RESET2
asserts when either SENSE3 or SENSE4 fall outside of the window
threshold. The pin can be left floating if it is unused.
RESET3
/
RESET3
-
-
6
-
O
RESET3/RESET3 asserts when SENSE3 falls outside of the overvoltage or
undervoltage threshold window.
RESET3/RESET3 stays asserted for the reset timeout period after SENSE3
fall back within the window threshold. Active-low, open-drain reset output,
requires an external pullup resistor. The pin can be left floating if it is
unused.
GND
4
4
4
4
-
Ground
NC
3, 5, 6, 7
5, 6
-
-
-
No Connect
www.ti.com
TPS3704
SNVSBZ2B – MARCH 2021 – REVISED DECEMBER 2021
Copyright © 2021 Texas Instruments Incorporated
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Product Folder Links: TPS3704



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