PS37044AJOFDDFR datasheet(7/34 Pages) TI

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7.4 Thermal Information

THERMAL METRIC (1)

TPS3704x

UNIT

DDF

PINS

RθJA

Junction-to-ambient thermal resistance

121.5

°C/W

RθJC(top)

Junction-to-case (top) thermal resistance

60.6

°C/W

RθJB

Junction-to-board thermal resistance

42.3

°C/W

ΨJT

Junction-to-top characterization parameter

2.2

°C/W

ΨJB

Junction-to-board characterization parameter

42.1

°C/W

RθJC(bot)

Junction-to-case (bottom) thermal resistance

N/A

°C/W

(1)

For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application

report.

7.5 Electrical Characteristics

At 1.7 V ≤ VDD ≤ 6.0 V, RESETx Voltage (VRESETx) = 10 kΩ to VDD, RESETx load = 10 pF, and over the operating free-air

temperature range of – 40°C to 125°C, unless otherwise noted. Typical values are at TA = 25°C, typical conditions at VDD =

3.3 V.

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

VDD

Supply Voltage

1.7

6.0

UVLO

Under Voltage Lockout (1)

VDD falling below 1.7 V

1.2

1.4

1.6

UVLO(HYS)

UVLO Hysteresis (2)

VDD rising below 1.7 V

VPOR

Power on reset voltage (3)

VOL (MAX) = 0.3 V, IOUT = 15 µA

0.7

VIT Range

Threshold Programming Range

0.4

5.55

VIT- (UV)

UV accuracy (25

℃)

0.1

VIT+ (OV)

OV accuracy (25

℃)

0.1

TOL_min

Tolerance Programming minimum

TOL_max

Tolerance Programming maximum

THR RES Low Threshold Programming Resolution Low VIT ≤ 0.8 V

mV / step

THR RES Mid

Threshold Programming Resolution Mid 0.8 V < VIT ≤ 4.0 V

0.5

% / step

THR RES High

Threshold Programming Resolution

High

VIT > 4.0 V

mV / step

VIT

Accuracy for absolute threshold

including tolerance

VIT < 0.8 V

-1.6

1.6

VIT

Accuracy for absolute threshold

including tolerance

VIT = 0.8 V - 5.55 V

-1

VHYS

VIT < 0.80V

1.1

1.4

1.7

VHYS

VIT ≥ 0.80V

0.40

0.75

IDD

TPS3704x

VDD ≤ 6.0V

5.5

µA

ISENSEx

Input current, SENSEx pin

VSENSEx = 5.5 V

2.5

µA

ISENSE_ADJ

Input current, SENSE pin (Bypass

internal resistor divider)- Adjustible

version

VSENSEx = 5.5 V

350

VOL

Low level output voltage

VDD = 1.7 V, ISINK = 0.4 mA

300

VOL

Low level output voltage

VDD = 2 V, ISINK = 3 mA

300

VOL

Low level output voltage

VDD = 6.0 V, ISINK = 5 mA

300

I(lkg)

Open drain output leakage current

VDD = VRESETx = 6.0 V

350

(1)

RESETx pin is driven low when VDD falls below UVLO.

(2)

Hysteresis is with respect of the tripoint (VIT- (UV), VIT+ (OV)).

(3)

VPOR is the minimum VDD voltage level for a controlled output state. Slew rate = 100 mV / µs.

www.ti.com

TPS3704

SNVSBZ2B – MARCH 2021 – REVISED DECEMBER 2021

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