P5021 datasheet(76/155 Pages) NXP

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P5021 QorIQ Integrated Processor Data Sheet, Rev. 1

Electrical characteristics

Freescale Semiconductor

This figure provides the AC test load for the eSPI.

Figure 13. eSPI AC test load

This figure represents the AC timing from Table 29 in master mode (internal clock). Note that although timing specifications

generally refer to the rising edge of the clock, this figure also applies when the falling edge is the active edge. Also, note that

the clock edge is selectable on eSPI.

Figure 14. eSPI AC timing in master mode (Internal Clock) diagram

2.11

DUART

This section describes the DC and AC electrical specifications for the DUART interface.

2.11.1

DUART DC electrical characteristics

This table provides the DC electrical characteristics for the DUART interface.

Table 30. DUART DC electrical characteristics (OVDD = 3.3 V)

For recommended operating conditions, see Table 3.

Parameter

Symbol

Min

Max

Unit

Notes

Input high voltage

VIH

2—

Input low voltage

VIL

—0.8

Output

Z0 = 50 Ω

CVDD/2

RL = 50 Ω

SPICLK (output)

tNIIXKH

tNIKHOV

Input Signals:

SPIMISO1

Output Signals:

SPIMOSI1

tNIIVKH

tNIKHOX

Output Signals:

SPI_CS[0:3]1

tNIKHOV2

tNIKHOX2

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