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ATXP032
DS-ATXP032–114I–4-2020
Figure 13-16. Hardware Reset Sequence from UDPD
13.11 Reset Summary
The following table summarizes the effects of the various reset functions:
13.12 Echo (AA)
The Echo command is used for testing the signal integrity and delays on I/O lines. It continues to return the same
data byte value as long as CS is held low and SCK is being clocked. This command is not supported in SPI mode.
In octal mode, the Echo command returns the same value on all lines continuously. To create alternating
waveforms in octal mode, use the Echo with Inversion command described in the following subsection.
RESET
SO
ICC
High-impedance
Ultra-Deep Power-Down Mode Current
Active Current
Standby Mode Current
tHWRES
tRST
Table 13-3.
Effects of Reset Functions
Action
Volatile Registers
Non-Volatile
Registers (1)
Sector Protection
Registers
EPE bit
Power Cycle
Default state
Unchanged
Default state
(protected)
See
Table 12-4
JEDEC Standard Hardware Reset
(In-Band Reset) (2)
Default state
Unchanged
Default state
(protected)
See
Table 12-4
Hardware Reset (RESET pin)
(not in UDPD) (3)
Default state
Unchanged
Unchanged
See
Table 12-4
Exit Ultra-Deep Power-Down
(Power cycle, JEDEC Reset)
Default state
Unchanged
Default state
(protected)
See
Table 12-4
Terminate (F0h)
WEL and RDY/BUSY
bits in are cleared in
Status Register Byte 1
Unchanged
Unchanged
See
Table 12-4
1.
Non-volatile registers are affected only by programming, not by any Reset sequences or power cycling.
2.
JEDEC Reset simulates POR cycle
3.
Hardware Reset (when not in UDPD) resets only volatile registers and internal state machines.



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