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ATXP032 bảng dữ liệu(PDF) 57 Page - Dialog Semiconductor

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ATXP032
DS-ATXP032–114I–4-2020
Figure 11-5. Read OTP Security Register in Octal Mode — SDR
Figure 11-6. Read OTP Security Register in Octal Mode — DDR
12.
Status and Control Registers - Descriptions and Commands
The ATXP032 has three Volatile Status and Control registers as listed in Table 12-1, and two Nonvolatile Status
and Control registers as listed in Table 12-2, one of which is reserved. All Status and Control registers can be read
and written by the generic Read Status Registers (65h) and Write Status Registers (71h).
For backward compatibility, the specific Read Status Register Byte 1 (05h) command is also supported for
Status/Control Register Byte 1, and the specific Write Status Register Byte 1 (01h) and Write Status Register Byte
2 (31h) commands are supported for Status/Control register 1 and 2. Note that the behavior of the Read Status
Register Byte 1 (05h) command is slightly different from many other Adesto products, as it only reads
Status/Control Register Byte 1.
When writing to registers, bits that are read only or reserved for future use should be written as 0. All volatile or
non-volatile registers may be written in a single operation by using the Write Status Registers (71h) command. It is
not recommended to try to write both the volatile and the non-volatile registers at the same time. Non-volatile
registers are only written if the Write Status Registers (71h) command specifies the address of a non-volatile
register.
Non-volatile registers are typically only written once, at the initial configuration of the device. Volatile registers have
to be re-written every time the device is powered up or wakes up from ultra-deep power down.
Byte1
Byte2
Output Data
Dummy Cycles
A23-16
A15-8
A7-0
A31-24
Address
77h
Opcode
2
3
1
0
4
n
n+1
I/O7-0
SCK
CS
DS
D
D
Output
Data
Byte1 Byte2
Dummy Cycles
A
A
A
A
Address
Bits A
31
-A
0
77h
Opcode
2
1
0
n
3
I/O7-0
SCK
CS
DS



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