ATXP032 datasheet(48/113 Pages) DIALOG

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ATXP032

DS-ATXP032–114I–4-2020

Figure 10-9. Protect Sector in Octal Mode — DDR

10.4

Unprotect Sector (39h)

Issuing the Unprotect Sector command to a particular sector address resets the corresponding Sector Protection

device has a corresponding single-bit Sector Protection register that is used to control the software protection of a

sector.

Before the Unprotect Sector command can be issued, the Write Enable command must have been previously

issued to set the WEL bit in the Status/Control register to a logic “1”. To issue the Unprotect Sector command, the

CS pin must first be asserted and the 39h command must be clocked into the device. After the command has been

clocked in, the four address bytes designating any address within the sector to be unlocked must be clocked in.

Any additional data clocked into the device after the address bytes is ignored. When the CS pin is deasserted, the

Sector Protection register corresponding to the sector addressed by A

31 - A0 is reset to the logic “0” state, and the

sector itself is left unprotected. In addition, the WEL bit in the Status/Control register is reset back to the logic “0”

state.

The complete four address bytes must be clocked into the device before the CS pin is deasserted, and the CS pin

must be deasserted on a whole byte boundary (multiples of eight bits); otherwise, the device aborts the operation,

the state of the Sector Protection register is unchanged, and the WEL bit in the Status/Control register is reset to a

logic “0”.

As a safeguard against accidental or erroneous locking or unlocking of sectors, the Sector Protection Registers

can themselves be locked from updates by using the SPRL bit of the Status/Control register. For more information,

refer to Section 12.1, Status/Control Register Byte 1. If the Sector Protection registers are locked, then any

attempts to issue the Unprotect Sector command is ignored, and the device resets the WEL bit in the

Status/Control register back to a logic “0” and returns to the idle state once the CS pin has been deasserted.

Address

Bits A

-A

36h

Opcode

I/O7-0

SCK

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