ATXP032 datasheet(46/113 Pages) DIALOG

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ATXP032

DS-ATXP032–114I–4-2020

Figure 10-5. Write Disable in Octal Mode — SDR

Figure 10-6. Write Disable in Octal Mode — DDR

10.3

Protect Sector (36h)

Every physical sector of the device has a corresponding single-bit sector protection register that is used to control

the software protection of a sector. Upon device power-up or after a device reset, each sector protection register

defaults to the logic “1” state indicating that all sectors are protected and cannot be programmed or erased.

Issuing the Protect Sector command to a particular sector address sets the corresponding sector protection

register to the logic “1” state. The following table outlines the two states of the sector protection registers. Note that

the sector protection register reverts to the default state after waking up from the ultra-deep power-down state, or

after a JEDEC Standard Hardware Reset (In-Band Reset).

Before the Protect Sector command can be issued, the Write Enable command must have been previously issued

to set the WEL bit in the Status/Control register to a logic “1”. To issue the Protect Sector command, the CS pin

must first be asserted and the 36h command must be clocked into the device followed by four address bytes

designating any address within the sector to be protected. Any additional data clocked into the device is ignored.

When the CS pin is deasserted, the Sector Protection register corresponding to the physical sector addressed by

04h

Opcode

I/O7-0

SCK

04h

Opcode

I/O7-0

SCK

Table 10-1. Sector Protection Register Values

Value

Sector Protection Status

Sector is unprotected and can be programmed and erased.

Sector is protected and cannot be programmed or erased. This is the default state.

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