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ATTINY817-MFR. bảng dữ liệu(PDF) 166 Page - Microchip Technology |
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ATTINY817-MFR. bảng dữ liệu(HTML) 166 Page - Microchip Technology |
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166 / 492 page  The TCA.PERL and TCA.PERH register pair represents the 16-bit value, TCA.PER. The low byte [7:0] (suffix L) is accessible at the original offset. The high byte [15:8] (suffix H) can be accessed at offset + 0x01. For more details on reading and writing 16-bit registers, refer to Accessing 16-bit Registers. Name: PER Offset: 0x26 Reset: 0xFFFF Property: - Bit 15 14 13 12 11 10 9 8 PER[15:8] Access R/W R/W R/W R/W R/W R/W R/W R/W Reset 1 1 1 1 1 1 1 1 Bit 7 6 5 4 3 2 1 0 PER[7:0] Access R/W R/W R/W R/W R/W R/W R/W R/W Reset 1 1 1 1 1 1 1 1 Bits 15:8 – PER[15:8]: Periodic high byte These bits hold the MSB of the 16-bit period register. Bits 7:0 – PER[7:0]: Periodic low byte These bits hold the LSB of the 16-bit period register. 20.5.16 Compare n Register - Normal Mode This register is continuously compared to the counter value. Normally, the outputs from the comparators are then used for generating waveforms. TCA.CMPn registers are updated with the buffer value from their corresponding CMPnBUF register when an UPDATE condition occurs. The TCA.CMPnL and TCA.CMPnH register pair represents the 16-bit value, TCA.CMPn. The low byte [7:0] (suffix L) is accessible at the original offset. The high byte [15:8] (suffix H) can be accessed at offset + 0x01. For more details on reading and writing 16-bit registers, refer to Accessing 16-bit Registers. Name: CMP0, CMP1, CMP2 Offset: 0x28 + n*0x02 [n=0..2] Reset: 0x00 Property: - ATtiny417/817 © 2017 Microchip Technology Inc. Datasheet Complete DS40001901B-page 166 |
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