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ATTINY817-MFR. bảng dữ liệu(PDF) 24 Page - Microchip Technology

tên linh kiện ATTINY817-MFR.
Giải thích chi tiết về linh kiện  AVR짰 Microcontroller with Core Independent Peripherals and picoPower짰 Technology
PDF  492 Pages
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ATTINY817-MFR. bảng dữ liệu(HTML) 24 Page - Microchip Technology

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6.9.3
Fuse Summary - FUSE
Offset
Name
Bit Pos.
0x00
WDTCFG
7:0
WINDOW[3:0]
PERIOD[3:0]
0x01
BODCFG
7:0
LVL[2:0]
SAMPFREQ
ACTIVE[1:0]
SLEEP[1:0]
0x02
OSCCFG
7:0
OSCLOCK
FREQSEL[1:0]
0x03
Reserved
0x04
TCD0CFG
7:0
CMPDEN
CMPCEN
CMPBEN
CMPAEN
CMPD
CMPC
CMPB
CMPA
0x05
SYSCFG0
7:0
CRCSRC[1:0]
RSTPINCFG[1:0]
EESAVE
0x06
SYSCFG1
7:0
SUT[2:0]
0x07
APPEND
7:0
APPEND[7:0]
0x08
BOOTEND
7:0
BOOTEND[7:0]
0x09
Reserved
0x0A
LOCKBIT
7:0
LOCKBIT[7:0]
6.9.4
Fuse Description
6.9.4.1
Watchdog Configuration
Name: 
WDTCFG
Offset:  0x00
Reset: 
-
Property:
 
-
Bit
7
6
5
4
3
2
1
0
WINDOW[3:0]
PERIOD[3:0]
Access
R
R
R
R
R
R
R
R
Reset
0
0
0
0
0
0
0
0
Bits 7:4 – WINDOW[3:0]: Watchdog Window Timeout Period
This value is loaded into the WINDOW bit field of the Watchdog Control A register (WDT.CTRLA) during
Reset.
Bits 3:0 – PERIOD[3:0]: Watchdog Timeout Period
This value is loaded into the PERIOD bit field of the Watchdog Control A register (WDT.CTRLA) during
Reset.
Related Links
Register Summary - WDT
RSTCTRL - Reset Controller
6.9.4.2
BOD Configuration
The settings of the BOD will be reloaded from this Fuse after a Power-On Reset. For all other Resets, the
BOD configuration remains unchanged.
ATtiny417/817
© 2017 Microchip Technology Inc.
Datasheet Complete
DS40001901B-page 24



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