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ATTINY817-MFR. bảng dữ liệu(PDF) 63 Page - Microchip Technology

tên linh kiện ATTINY817-MFR.
Giải thích chi tiết về linh kiện  AVR짰 Microcontroller with Core Independent Peripherals and picoPower짰 Technology
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The start-up time of a given crystal oscillator can be accommodated by writing to the Crystal Start-up
Time bits (CSUT) in CLKCTRL.XOSC32KCTRLA.
When XOSC32K is configured to use an external clock on TOSC1, the start-up time is fixed to 2 cycles.
External Clock (EXTCLK)
The External Clock is taken directly from the pin. This GPIO pin is automatically configured for EXTCLK if
any peripheral is requesting this clock.
This clock source has a start-up time of 2 cycles when first requested.
10.3.5
Configuration Change Protection
This peripheral has registers that are under Configuration Change Protection (CCP). In order to write to
these, a certain key must be written to the CPU.CCP register first, followed by a write access to the
protected bits within four CPU instructions.
It is possible to try writing to these registers any time, but the values are not altered.
The following registers are under CCP:
Table 10-2. CLKCTRL - Registers under Configuration Change Protection
Register
Key
CLKCTRL.MCLKCTRLB
IOREG
CLKCTRL.MCLKLOCK
IOREG
CLKCTRL.XOSC32KCTRLA
IOREG
CLKCTRL.MCLKCTRLA
IOREG
CLKCTRL.OSC20MCTRLA
IOREG
CLKCTRL.OSC20MCALIBA
IOREG
CLKCTRL.OSC20MCALIBB
IOREG
CLKCTRL.OSC32KCTRLA
IOREG
Related Links
Sequence for Write Operation to Configuration Change Protected I/O Registers
ATtiny417/817
© 2017 Microchip Technology Inc.
Datasheet Complete
DS40001901B-page 63



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