STR720RBQ6 datasheet(47/401 Pages) STMICROELECTRONICS

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STR720 - MEMORY ORGANIZATION

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6 MEMORY ORGANIZATION

The memory space of the STR720 device is configured in a Von Neumann architecture. Code

memory, data memory, registers and I/O ports are organized within the same linear address

space of 4 GBytes.

The entire memory space is sub-divided in 8 main blocks (512 MBytes each), selected by the

most significant bits of the AHB address bus.

There are three external blocks in the STR720 memory map: the SDRAM area, the

ATAPI-IDE area and the EMI area, all using little endian format.

In the following sub-sections the relevant memory areas are briefly described.

6.1 Program memory

STR720 implements a 16 KBytes program RAM block, located in the address range from

0x6000_0000 to 0x6000_3FFF and organized as a 4K of 32-bit wide memory.

Immediately after system reset, program memory is accessible only at the above mentioned

address range within Block 3, allowing its initialization during the boot procedure when the

code is fetched from EMI area (external-boot mode). At the end of boot sequence a specific

GCR register is written to modify the memory map (“Boot re-map” operation). After the “Boot

re-map” operation, Program Memory will be available also from address 0x0000_0000 (Block

0) to allow application code execution.

Program Memory can be used for both code (instructions) and data (constants, tables, etc.)

storage. Code fetches are always made on even byte addresses. Word data accesses can be

made to even or odd byte addresses.

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