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công cụ tìm kiếm bảng dữ liệu linh kiện điện tử |
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công cụ tìm kiếm bảng dữ liệu linh kiện điện tử |
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DSP56857 bảng dữ liệu(PDF) 190 Page - Freescale Semiconductor, Inc |
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DSP56857 bảng dữ liệu(HTML) 190 Page - Freescale Semiconductor, Inc |
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190 / 662 page  Register Descriptions (ITCN_BASE = $1FFF20) 5685X Digital Signal Controller User Manual, Rev. 4 8-12 Freescale Semiconductor 8.7.4 Interrupt Priority Register 3 (IPR3) Figure 8-6. Interrupt Priority Register 3 (IPR3) See Programmer’s Sheet on Appendix page B - 25 8.7.4.1 ESSI0 Transmit Data Interrupt Priority Level (ESSI0_TD IPL)—Bits 15–14 This bit field is used to set the interrupt priority levels for certain peripheral IRQs. These IRQs are limited to priorities zero through two and are disabled by default. • 00 = IRQ disabled (default) • 01 = IRQ is priority level 0 • 10 = IRQ is priority level 1 • 11 = IRQ is priority level 2 8.7.4.2 ESSI0 Transmit Data with Exception Status Interrupt Priority Level (ESSI0_TDES IPL)—Bits 13–12 This bit field is used to set the interrupt priority levels for certain peripheral IRQs. These IRQs are limited to priorities zero through two and are disabled by default. • 00 = IRQ disabled (default) • 01 = IRQ is priority level 0 • 10 = IRQ is priority level 1 • 11 = IRQ is priority level 2 8.7.4.3 ESSI0 Receive Last Slot Interrupt Priority Level (ESSI0_RLS IPL)—Bits 11–10 This bit field is used to set the interrupt priority levels for certain peripheral IRQs. These IRQs are limited to priorities zero through two and are disabled by default. • 00 = IRQ disabled (default) • 01 = IRQ is priority level 0 • 10 = IRQ is priority level 1 • 11 = IRQ is priority level 2 Base + $3 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Read ESS0_TD IPL ESS0_TDES IPL ESS0_RLS IPL ESS0_RD IPL ESS0_RDE S IPL DMA5 IPL DMA4 IPL DMA3 IPL Write Reset 0 00 000 00 00 000 00 0 |
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